I'm new designing a high/medium voltage (V <=10kV) with low voltage and low current (10mA). There will be only a few HV relays. Their coils will be triggered by LV.
I have read some literature about this subject. I have known that noise could be coupled to the parasitic capacitance at the insulation: "If noise couples through parasitic capacitance on the board or in the insulation, it can easily propagate to very sensitive areas of the board".
So, it could be bad news if this capacitor discharges its own charge and starts having continuity between 2 isolated points where should be isolation.
How could I avoid these capacitor effects? How can I stop the noise running through Capacitance between 2 isolated (or potential different) points?