I'm working with a Sierra Wireless BC127 (Bluetooth Module) I2S master which is generating Left-Justified, 16 bps @ 44.1khz sample rate. The Bit clock is set to 2.822 Mhz.
I want to use a Cirrus Logic WM8804 to convert the I2S data to S/PDIF @ 44.1khz (please ignore the fact that the BC127 can output S/PDIF -- I need both digital audio formats). It appears that since the WM8804 needs to operate in slave I2S mode, the internal PLL cannot be used to generate the clock, and MCLK must be provided.
Unfortunately, the BC127 does not output MCLK, so I believe I need to use the bit clock (BCLK) from the BC127 to generate MCLK.
I believe I can use something like the Cirrus CS2300-03 to generate the MCLK, is that correct?
If the above is correct, what should I multiply BCLK by in order to generate a useful MCLK?
Are there any simpler means of generating MCLK? Keep in mind that the BC127 won't run as an I2S slave.
Additionally, what frequency crystal should I connect to the WM8804 to generate the required S/PDIF signal?