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I am designing a boost converter with the help of this TI app note

My output Load current is 300mA and output voltage is 28V.

I need to calculate the output ripple current. But in the app note, no formula for output ripple current is provided. Could you please me on how to calculate the output ripple current? Could you also help me with the input ripple current calculation? It would be better if someone help me the with the concept of output ripple and input ripple for currents and voltages

Thanks.

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  • \$\begingroup\$ What’s you switch frequency, duty cycle, input voltage, output voltage, inductor value, output capacitance and ESR of said capacitor? \$\endgroup\$ – winny May 22 at 11:47
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    \$\begingroup\$ It's in the app note, formula 2 on page 2: delta I[L]. \$\endgroup\$ – JimmyB May 22 at 12:07
  • \$\begingroup\$ @JimmyB that only applies to inductor ripple current and not input or output V,I \$\endgroup\$ – Sunnyskyguy EE75 May 22 at 15:14
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    \$\begingroup\$ @SunnyskyguyEE75 But inductor ripple current IS input current ripple in a boost converter (for purposes of how much ripple current the input caps see). The input supply ripple current is of course different given the input cap filtering. \$\endgroup\$ – John D May 22 at 15:38
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    \$\begingroup\$ I think the OP wants to see the input and out ripple voltage due to this and ESR's , DCR @JohnD \$\endgroup\$ – Sunnyskyguy EE75 May 22 at 15:39
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added May 23rd

The concept is all parts have ESR so peak current and ripple current cause ohmic losses in regulation and ripple voltage. enter image description here

Ripple cannot be eliminated, but it can be minimize by knowing the impedance of each part. Z(f) and look at transfer ratios. The biggest ripple reduction is to raise the switch frequency > 1MHz but this demands more expensive fast FETs and a good tight PCB EMI layout with care on stray ESL, C and orientation of loop currents. This reduces Δt a lot and reduces size of C since Zc=1/ωC This not something you can put on a breadboard. You just etch a small PCB or design it and buy 1 for $50.


Two estimates for Inductor ripple current depend on choice of L:
- \$\Delta I_L= (0.2 ~to~ 0.4) \cdot I_{OUT(max)} \cdot \dfrac{V_{OUT}}{V_{IN}}~~~~~ \$, if L is unknown
- \$\Delta I_L=\dfrac{ V_{IN(min)}\cdot D} {f_S} \cdot L\$
- for \$D=1-\dfrac{V_{IN(min}) \cdot η}{V_{OUT}}\$, for duty cycle,D and efficiency, η

Next, output voltage ripple generated by boost converter

\$\Delta V_{OUT}=ESR_{_{OUT} }\cdot \left \{ \dfrac{ I_{OUT(max)} } {1-D} + \dfrac{\Delta I_L}{{2}}) \right \} + \dfrac{I_{L(max)}\Delta t_{(max)}}{C_{out}}\$

\$C_{OUT}\$ RMS ripple current rating = 25% to 50% of \$I_{L(max)}\$

The biggest Cin load current is an abrupt startup with In=Vin/ESRin which for 10V/10 mohms from an ideal voltage source= 1kA surge current !!, so soft-start conditions need to be considered.

The biggest surge voltage on the output is a drop in load current.

Of course, wide load variations can be mitigated by various alternate design techniques such as ZVS and buck-boost switches.

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  • \$\begingroup\$ Thank you. But before that, I have one doubt. Sorry for the naive question. I would like to understand the concept. Why is the duty cycle is 1-(Vin.η/Vout) ? Why do we subtract from 1? And is it possible for you to elaborate your answer in simple terms as I am trying to learn the concept of converter design using app notes and google. Other formulas and selections are pretty straight forward. Only Input Voltage ripple,Output Voltage ripple and input ripple current and output ripple current are my grey areas. I just want to understand the concept on why I have to calculate these \$\endgroup\$ – Newbie May 23 at 5:06
  • \$\begingroup\$ Increasing D also increases L current and output voltage ratio, so ideally D+Vin/out=1 and thus increasing D also increases ΔIL as does Vin and L . If you want some hands on experience try my rubber band simulation with a slider for every component and try to make a 10A 24V open loop converter. (no feedback included, which would change PFM PWM ) high Freq has the biggest benefits but can be lower efficiency. tinyurl.com/y2nm3p6o ...the trace and part will turn turqoise when U point at them to learn what where it comes from \$\endgroup\$ – Sunnyskyguy EE75 May 23 at 12:32
  • \$\begingroup\$ tinyurl.com/y6jfz2ve Simulation is not real-time but slowed down with a slider. Remember this demonstrates bad choices of values with instability too and is intentionally not regulated without feedback so you can see the effects \$\endgroup\$ – Sunnyskyguy EE75 May 23 at 12:41
  • \$\begingroup\$ Sure thank you . \$\endgroup\$ – Newbie May 24 at 5:37

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