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In the 23:40 of the youtube video https://youtu.be/YQ7SXJqIpzs , the presenter does a p-channel mosfet test for short, using his bench power supply on the circuit.

From what i understood, he disconnected the charger and with his bench power supply he applied the nomimal 19v with 0.5A of current on the Drain of the suspected mosfet. The DMM showed about 0.2A and he concluded that the mosfet is not shorted. I suspect the he tried to switch ON the mosfet externally but i can not see the actual wiring.

Can someone explain how this test works ? And the other thing i saw is that this laptop motherboard had two mosfet one n-channel that outputs to a p-channel. Why this combination is used ? I mean what is the purpose of this?

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A higher than logic level voltage switch (e.g. 19V charger) using a high side Pch switch needs a level shifter to pull down the gate pullup resistor the Pch gate.

The voltage Nch switch might use a logic level to pull down it’s drain with low current as a level shifter.

Since each FET inverts changes in voltage from Gate to Drain, the 2 stages form a non-inverting high side switch .

Measuring voltages powered on is the best way to detect if the FET is OFF or ON or shorted by trying to turn it off by shunting the Vgs below threshold with a 1k resistor safely or visa versa from gate to drain.

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  • \$\begingroup\$ I am not sure if I understood your answer very well. So please clarify where should I connect (+) and (-) of the bench power supply and what to measure using my DMM using, for example, a p-channel MOSFET. As far as I did see from the video, he tried to switch ON the MOSFET. This can only be done when Vgate-source will be bigger than a minimum threshold (Vt) right? How he did that? There is no applied voltage between Gate and Source. The only I saw in this video, was PSU GND and DMM (+)probe to the out pins (Drain) of the MOSFET. \$\endgroup\$ – Maverick May 23 at 8:17
  • \$\begingroup\$ Yes but I didn't watch the whole video after that time, because it was poorly done. There is a search tool on this site to find how FETs work and to bias them as a switch with at least 2 to 3*Vt, as this becomes voltage controlled resistance, but the circuit tested was poorly documented for inputs and outputs. Was it active? then passive pullup/down to gate can be tried while monitoring Drain \$\endgroup\$ – Sunnyskyguy EE75 May 23 at 11:58

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