# PSpice simulation of phase-shift oscillator doesn't work

I'm trying to simulate on PSpice a BJT-based phase shift oscillator, like in the following schematic:

but when trying to measure the voltage on the node connecting R3 and R5 I only get DC voltage (around 5 volts). Am I missing something? I've been trying this for the last 3 hours but no dice.

Thanks in advance for any help!

• insert a 0.1 volt step, at time = 1 millisecond. – analogsystemsrf May 23 at 14:40
• You mean a DC sweep? – lightspot21 May 23 at 14:43
• What have you tried so far? – sstobbe May 23 at 14:43
• ...or add an initial condition in one of the caps: you would actually need noise to crank it up but the .IC should do. – Verbal Kint May 23 at 14:43
• @sstobbe I've tried sweeping R3 (from 10k to 220k), cause I thought that maybe the resistance is too high, but it didn't work :( – lightspot21 May 23 at 14:45

Now that you have it working.

• Is the sine wave distorted?
• Will it work over a 3:1 range in hFE?
• Or a range in Vcc from 3.3V to 24V?

By adding some DC bias to pulldown the base or use more negative feedback to reduce distortion but that also reduces gain. So the ratio of Feedback and Base to ground ought to be around 10:1 while the Rfb can now be reduced to 25x Rc.

The trick I added here is some positive feedback to raise the base impedance and reduce sensitivity to hFE, Vdd. Although this is much more linear, the amplitude is not well controlled which requires a soft limiter which then introduces some distortion.

The innovation I added with a couple of resistors is to maintain a feedback R ratio but add an emitter resistor that is <= 10% of Rc which makes it has some negative and positive feedback "bootstrap" effects to raise input impedance and keep the Collector current < 10:1 range for full-scale signal. This is the trick to make it linear, rather than saturate at Imax and starve at low gain at Imin with >> 10:1 max:min ratio. By raising the input impedance, I was trying to get input impedance near 10k which before, was much lower with Vbe to ground,

The Resistor values are not too critical, HOWEVER, the ratios are important for the biasing, gain, stability and linearity. Notice the R ratios from Vcc to collector to base to ground. The 3 stage HPF uses the same R values as the collector here but could be changed.

Insufficient gain, insufficient phase shift, or both.

My back of the envelope calculations tell me that the input impedance to the transistor stage, including your bias-and-voltage-feedback network, is around $$\110\Omega\$$. While the stage itself has a voltage gain of around 360, that input impedance is going to short out the return signal -- and the natural frequency of that last high-pass section will be way higher than of the other two.

I suggest changing to a 3-resistor bias network that's not connected to Q1's collector (i.e., hold the base at around 2VDC, and use an emitter resistor to set the collector current. Then bypass the emitter resistor with a big cap).

• Thanks for the answer, but the thing is I can't change anything, because this particular circuit is an assignment. – lightspot21 May 23 at 15:30
• Then please make that clear in your question. You may wish to double-check that R3 and R4 match the assignment -- there's no real reason to have those two in series. – TimWescott May 23 at 16:08