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I've been prototyping this pretty simple circuit for a while now:

schematic

simulate this circuit – Schematic created using CircuitLab

Description: C3 is charged to set point. Compatator out put goes high causing the MOSFETs to switch on the load. Switching load causes a voltage drop so positive feedback provides hysteresis. C3 must be charged in order to start the motor. Should input voltage be lost, motor will also continue to run off C3 until cut off point. I didn't include a link to the compatator because its data sheet has many models and is just confusing for people. The compatator has PUSH-PULL output with sufficient sourcing to drive M1.

I don't actually know what the specs on the motor are. It runs at 1.5V and 100mA isn't enough current to start it. Once running the 100mA input is sufficient to run the motor and keep C3 charged.

C2 was not part of my original design and the output from M2 was much lower than expected/desired. Messing around with the various R values didn't really have any impact. I intuitively felt the problem was with the MOSFETs. So I added C2 and that greatly improved the output characteristics.

Note that it works without C2. But there is a larger than desirable voltage drop over M2 without it.

However, I don't really know WHY adding it had that effect.

Can anyone shed some light on what the problem was and how adding that cap helped?

Update: This is only true when the power source is the bench supply. When the intended power source is connected (9V Solar), C2 causes the circuit to stop functioning. So I guess I will not be including it on the PCB layout, but I'm still pretty confused by this behavior.

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  • \$\begingroup\$ What’s R2 and R3 doing? \$\endgroup\$
    – winny
    May 25, 2019 at 7:45
  • \$\begingroup\$ What are the values of C3 and the resistors? What is the purpose of the circuit? What are the specs of the motor? (eg. DC resistance, motor size and type). \$\endgroup\$ May 25, 2019 at 8:36
  • \$\begingroup\$ @winny R1, R2 and R3 create a voltage divider with positive feedback. \$\endgroup\$
    – hekete
    May 26, 2019 at 5:16
  • \$\begingroup\$ @BruceAbbott I've updated the question to include all values and more info. \$\endgroup\$
    – hekete
    May 26, 2019 at 5:18
  • \$\begingroup\$ I see. I still fail to see what you are trying to accomplish. It smells XY problem. Please take note of @Transistor ease of reading diagram below. \$\endgroup\$
    – winny
    May 26, 2019 at 7:25

1 Answer 1

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schematic

simulate this circuit – Schematic created using CircuitLab

Figure 1. OP's circuit adjusted for ease of reading.

It is not clear how you expect this circuit to work. The combination of R1, R2 and R3 looks like it is intended to apply some positive feedback to make the circuit operate as a Schmitt trigger.

You might be just getting lucky and somehow switching on the NMOS / PMOS output, causing the V+ to drop and that drop is getting "kicked" through the capacitor enough to switch the comparator and get the circuit to oscillate.

Overall, I'd recommend that you edit your question to explain how you intend this to work, add in the component values and the designators (Q1, Q2, etc.) so that it is easier to discuss the circuit.

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  • \$\begingroup\$ I know the datasheet is confusing, which is why I didnt link it. The compatator has push-pull outputs, trust me! :p \$\endgroup\$
    – hekete
    May 25, 2019 at 10:21
  • \$\begingroup\$ From the table at he top of page 7: The MAX9064 has a push-pul output. (their spelling, not mine). \$\endgroup\$
    – brhans
    May 25, 2019 at 12:29
  • \$\begingroup\$ Ah, I missed that. It's even on the image I posted. Edit coming ... \$\endgroup\$
    – Transistor
    May 25, 2019 at 13:01
  • \$\begingroup\$ I don't think it's 'luck'... The circuit operates as intended in various tests. When the threshold voltage to the COMP is reached, the output goes to Vin-0.2 and drives the NMOS / PMOS output. There is an immediate 100mV drop on switching, which the positive feed back prevents from causing the COMP to switch off. It's possible that the PMOS isn't fully opening or is oscillating and the addition of C2 attenuates this behavior. \$\endgroup\$
    – hekete
    May 26, 2019 at 7:45

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