I'm designing an antilog amplifier which produces an exponential output (0.4 mV to 4 V) for a 50 Hz sawtooth input waveform (4 mV to 4 V ramp). If this were a linear circuit, I could determine the circuit bandwidth by drawing the small-signal model by hand or by performing an ac analysis in SPICE. However, because the circuit performs a nonlinear operation, I'm unsure whether the concept of bandwidth even applies let alone how to calculate it by hand or by simulation.

I'm currently running a transient analysis with a 50 Hz sawtooth input and verifying that there's no noticeable time delay in the output. For stability, I'm applying a large-signal step input and verifying that the output is overdamped. Are these reasonable methods for determining 'bandwidth' and stability of a nonlinear circuit? If I had to do this by hand, what method could be employed for determining the nonlinear equivalent of bandwidth for a particular circuit?

  • \$\begingroup\$ My gut feeling says that you should be able to model it as a linear circuit where you simply convert the amplification to the highest dy/dx you expect to have. - My reasoning is this: Using a similar-looking function like \$y=x^2\$, the derivative is \$\dot{y}=2x\$, if \$y\$ lives within 0.4 to 4, then the highest derivative will be 4, and if your system can support that, then it should be able to support everything else. The new system could be approximated to \$y=4x-2\$ which is tangent to \$y=x^2\$ at \$x=2\$. I don't know if you can do this approximation, hence this being a comment. \$\endgroup\$ – Harry Svensson May 26 '19 at 1:15

I will divide the answer to the question in two parts, the first pertaining to the definition of bandwidth for nonlinear systems and on the method you use to characterize it, while the second pertaining to the stability of such systems.

A concept of bandwidth for nonlinear circuits

For nonlinear circuits, as also Heath Raftery remarks in his answer, the concept of bandwidth is not formally defined in an unique way. However, if we think of bandwidth as a way of characterizing how well the output of a circuit reproduces an ideal function of the input, then for some nonlinear circuits it is possible to define a similar figure of merit by using the the rise time, and your circuit is possibly one of those.

Premises. We have a circuit which performs a nonlinear transformation on a given input signal \$v_{in}\$ $$ v_{out}=f(v_{in})\label{1}\tag{1} $$ such that

  • \$f\$ is a continuous function
  • \$f\$ is one-to-one i.e. \$f(v_{in1})\neq f(v_{in2})\$ when \$v_{in1}\neq v_{in2}\$.

If we test this system with an input signal proportional to the Heaviside function by an appropriate amplitude factor \$A\$ as you do, i.e. if we put $$ v_{in}(t)=AH(t)= \begin{cases} A &t\ge 0\\ 0 &t< 0 \end{cases}\:\:,\label{2}\tag{2} $$ the above hypotheses guarantee that, in the ideal case, \$v_{out}(t)\$ has again the form of a Heaviside function, precisely the following one $$ v_{out}(t)= \begin{cases} f(A) &t\ge 0\\ f(0) &t< 0 \end{cases}\:\:, $$ since the output voltage of the circuit goes immediately from \$f(0)\$ to \$f(A)\$. In the real case, this is not so and a finite, maybe small, time is needed for the output transition.

A crucial hypothesis and the consequent definition of bandwidth. If, during the output transition due to \eqref{2}, \$v_{out}(t)\$ does not show any oscillating behavior (as you noticed by stating that the response shows "overdamped behavior"), we can legitimately model the system as follows


simulate this circuit – Schematic created using CircuitLab

i.e. we can model it as the cascade of a ideal nonlinear block, a simple pole unity gain stage (modeled as a \$R_rC_r\$ circuit) and a unity gain buffer. This in turn implies that we can measure the rise time \$t_r\$ of the whole system and associate to it a bandwidth by using the formulas developed for single pole step response, i.e. $$ BW \cong \frac{0.35}{t_r} $$

The problem of stability of nonlinear circuits

The problem of stability of nonlinear circuits is such that I can only spend few words on it: despite the fact that only few and not absolutely general stability criterion are known (see the wikipedia link in Heath Raftery's answer), the problem has been widely addressed therefore there is an enormous literature dealing with it. I am not sure that the testing procedure described above is sufficient to say something on the transient behavior of your circuit, since this depends heavily on how it is constructed, i.e. on what the real (as opposed to ideal) nonlinear transformation (as opposed to function, since it should possibly include nonlinear memory effects, delays, etc.) really is. We have assumed that the linear non ideal part can be fully characterized as a single pole transfer function: however, as it could be seen from the wikipedia entry on rise time, a (non-realizable) Gaussian response (i.e. with an infinite number of poles) system has a bandwidth which is nearly the same (\$BW \cong \frac{0.34}{t_r}\$) but has an entirely different stability behavior when included in a feedback loop thus our assumption, while leading to a somewhat satisfactory solution from the point of view to the bandwidth, can be misleading if used to analyze stability.

I advice you to have a look at the wikipedia entries on "Stability theory" and "Lyapunov stability", just to see if there is an easy way of proceed in your particular case.

Final notes

  • The bandwidth definition proposed is in turn the consequence of a modeling trick which consists in assuming that the nonlinear function block is ideal and capable to perform exactly its function on input signals having any bandwidth: the non-ideal behavior is attributed to a linear block for which the customary bandwidth concept is well defined and measurable.
  • The amplitude \$A\$ of the step function test signal may or may not influence the value of \$t_r\$ and thus of \$BW\$, even in the case of a nonlinear circuit, and it is not necessarily true that higher input levels imply lover values of bandwidth. However, this is usually true since the higher the current flowing through the circuit is, the higher the charge stored inside and this in turn imply that the process of changing the state of the system is slower so the bandwidth lowers.
  • In order to consider the rise time of the output, we tacitly have assumed that \$v_{out}(0)<v_{out}(A)\$ i.e. that if the input rises, so does the output: however, this choice does not restrict the generality of the above analysis.
  • Last but not least, it is advisable to measure the rise time \$t_r\$ with a very low input capacitance scope probe: this avoids that the finite output resistance of the buffer stage jointly with the stray capacitance increases significantly the measured value by creating a further low frequency pole.

Frequency analysis only applies to linear, time-invariant (LTI) systems. There are various ways to interpret the concepts of bandwidth and stability in a non-linear system, but it's not clear which is the right one to apply. You might like to start with the ideas and list of techniques here:



Extract the small-signal behavior at 4mV in, and examine the BODE, or step 4mV +- 0.1mV Vin as squarewave and examine the step response.

Now repeat at 4vin +-0.1 volt.

Or you can extract the diode (anti-log circuit, right?) "reac" which is approximately 0.026 volts / Idiode; thus at 1mA thru the diode, the "reac" (1/gm) is 0.026/0.001 or 26 ohms. At 100uA: 260 ohms. At 10uA: 2,600 ohms.

If you push the OpAmp into gains near 0dB, or less than 0dB CLOSED LOOP, the gain and phase margins may kill the closed-loop stability. Chances are that the macro-model will NOT implement any nuances of the gain/phase curves, thus the simulator likely will not capture those (mis)behavaiors, so your best bet is to stay well away from UnityGain operation.


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