I've never done this or worked with 24-bit numbers and a quick search reveals little. The datasheet is quiet on the topic too.
I assume that the ADC would count down past zero in the sequence
0000 0000 0000 0000 0000 0011 = 3
0000 0000 0000 0000 0000 0010 = 2
0000 0000 0000 0000 0000 0001 = 1
0000 0000 0000 0000 0000 0000 = 0
ffff ffff ffff ffff ffff ffff =-1
Wikipedia's gives the following example:
The following Python code shows a simple function which will convert an unsigned input integer to a two's complement signed integer using the above logic with bitwise operators:
def twos_complement(input_value, num_bits):
'''Calculates a two's complement integer from the given input value's bits'''
mask = 2**(num_bits - 1)
return -(input_value & mask) + (input_value & ~mask)
Trying this in a Python console ...
mask = 2**(24 - 1)
decimal = -(0xff47d3 & mask) + (0xff47d3 & ~mask)
print decimal * 1.235 / 2**23
... which is about 7 mV.
A simpler solution depending on your microcontroller would be to left shift the number by four bits. This will preserve the two's complement but make it available to a 32-bit calculator.
0xff47d3 << 4 // results in 0xff47d300 = -12070144
Oxff47d300 / 256 = -47149
which is the same number we got using the Python method.
This seems a little odd in that the 4-bit left shift is usually considered a x 256 multiplication and then we're following it by a / 256 division so why bother? The answer is that the left shift preserves the two's compliment and the sign of the number for use by a 32-bit arithmetic logic unit. The division can then proceed correctly.