I am working with a device. Block diagram looks like this:

block diagram

I was facing a noise challenge and asked a question here. I implemented the RC filter design suggested by @analogsystemsrf and got good results for 7 V line. I cut the Vin trace on my PCB and introduced the filter using external components to check if everything works alright.

To my surprise, the filter was working earlier but I was getting a lot of noise on 3.3 V line. Then I realized that noise is getting coupled through UART lines to the VCC.

Noise signature is exactly same (in waveform shape and magnitude) on UART lines and VCC.

PCB design details: 2 layer board (30 mm X 40 mm) with GND plane covering entire PCB on both sides. GND plane is shared by device as well as zigbee.

I am thinking whether putting a similar filter on UART lines (baud rate - 115200) will mitigate the issue. Or should I put a series resistor on both UART lines? I am clueless in this regard about exact circuit and values. Since both lines are pulled up, I think this circuit should work:

uart filter

Can someone please help me decide whether I am on right path?


  • 1
    \$\begingroup\$ The time constant of such a filter would need to be sub-microsecond to not interfere with normal communications at 115200 (about 500 nsec to retain full swing for 50% of bit time). That said, it would be very slow edge and might cause all manner of interesting behaviour for a CMOS input unless it has a schmitt trigger input. \$\endgroup\$ Jun 7 '19 at 13:01
  • \$\begingroup\$ Filtering the signals shouldn't be necessary in this situation. Is the LDO on the ZigBee side? It should be, these are sometimes called Point-Of-Load regulators, which means you want them close to the load. What is the length of the RX and TX lines? Are you having real issues, or just seeing noise on the scope. Properly measuring for signal integrity can be difficult with regular scope probes. I used differential FET probes for this when I was working; unfortunately, they are rather expensive for a hobbyist. \$\endgroup\$
    – Mattman944
    Jun 7 '19 at 13:31
  • \$\begingroup\$ hey, do you happen to have a picture of the trace layout? I think the solution to this isn't filtering the signal lines, but making sure they don't couple over to the power. By the way, the problem is almost always the other way around: noise from the power supply coupling into signal lines. There's even an IT Crowd sketch about that. \$\endgroup\$ Jun 7 '19 at 13:34
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    \$\begingroup\$ Is the communication voltage actually compatible on both ends? I mean if you get 7V from the Device is the Rx and Tx on 3.3V? \$\endgroup\$
    – Arsenal
    Jun 7 '19 at 13:37
  • \$\begingroup\$ "Noise signature is exactly same" makes me think of a third-party aggressor, or a measurement issue. If the noise was getting from the UART lines to VCC, you'd expect a difference in magnitude. Also, 2 layer board with ground plane on both sides, that does not make sense to me, where are your signals? \$\endgroup\$
    – MAB
    Jun 7 '19 at 17:06

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