1
\$\begingroup\$

I have a simple question I think... In my Design of PCB for standard parameters I need to have a trace of 1.5mm for power supply 4.7V 2A but I don’t know HOW to use vias here. What hole size and diameter I need to keep 1.5mm trace between top and bottom layer?

This is my actual trace and vias

enter image description here

\$\endgroup\$
  • 1
    \$\begingroup\$ To have a via provide 1.5 mm wide conduction path, the 2*pi*radii must be 1.5 mm. Thus 1.5 mm/6.3 = 1/4mm would be a start to your thinking. \$\endgroup\$ – analogsystemsrf Jun 7 '19 at 17:29
3
\$\begingroup\$

Think about why you are using such a wide trace for the power. It's to limit the total resistance of the connection from the power supply to the load.

Each via in the path will add resistance. You can use an online calculator or something like the Saturn PCB calculator (or some basic math) to determine the resistance of your via based on the via diameter, plating thickness, and via height.

Now just make sure the total resistance of the traces plus vias doesn't exceed your requirement for total connection resistance.

A second (but not secondary) consideration is the self-heating of the via. A calculator like the Saturn one can give an estimate of the self-heating of the via as well as the resistance. But you can't expect this to be particularly accurate because the calculator doesn't know about other copper features around the via that can improve thermal conductivity away from the via, or about other sources of heat near the via.

For example, a 10 mil via, with 0.7 mil copper plating through a 62 mil board, is about 0.002 ohms. That means about 4 mV drop for 2 A, which is probably no problem. But, with 2 A through it, it will heat up about 30 C. That could be acceptable in your application, or you might want to use larger or more vias to reduce self-heating.

You can also consider using several small vias in parallel rather than one large via to connect between layers.

\$\endgroup\$
  • \$\begingroup\$ Thanks. I have a question What happens if my vias is wrong and it doesn’t allow to draw 2A current while the RF chip is requiring 2A. The via will dead? \$\endgroup\$ – asterix Jun 7 '19 at 17:23
1
\$\begingroup\$

What hole size and diameter I need to keep 1.5mm trace between top and bottom layer?

Vias add parasitic inductance and resistance to the current pathway. The amount of resistance and inductance can be calculated. Realize that traces and vias are made from copper which has resistance, which is bad if it heats up from too much current in it. The resistance also causes a voltage drop, if the traces/vias have too much of a voltage drop, it can cause problem in a design.

Also, you can parallel vias, sometimes a few smaller vias are better in parallel than a large one. Shown below: enter image description here

\$\endgroup\$
  • \$\begingroup\$ how much current draw each via here? and what size and diameter you used ? \$\endgroup\$ – asterix Jun 7 '19 at 18:25
  • \$\begingroup\$ 15mil by 30mil, I can't remember how much current this design actually draws \$\endgroup\$ – Voltage Spike Jun 7 '19 at 18:36

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.