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I recently read some papers that mentioned multicontext FPGAs, which have several copies of every programming bit. This allows to download a bitstream to the board while the active context (the aforementioned programming bits are multiplexed) performs computing tasks. This is different from partial reconfiguration in that the context switch requires a complete reconfiguration of the programming bits. My question is: do they actually exist? Or is it just a theoretical model yet?

Edit: This is the first paper where I first found the concept: Compton, K., & Hauck, S. (2002). Reconfigurable computing: a survey of systems and software. ACM Computing Surveys (csuR), 34(2), 171-210.

Here's the link to it: https://dl.acm.org/citation.cfm?doid=508352.508353

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  • \$\begingroup\$ Sure, I added the reference to the paper that aroused my question. I found the rest of them just by looking up the concept in Google. I just read over the titles. \$\endgroup\$ – HastatusXXI Jun 12 '19 at 16:41
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    \$\begingroup\$ Sounds theoretical since the first to implement it would probably be Altera or Xilinx and if they did they would advertise it to high hell. \$\endgroup\$ – DKNguyen Jun 12 '19 at 17:42
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    \$\begingroup\$ You could note the company mentioned Chameleon Systems Inc. went through bankruptcy proceedings in 2004. The technology hurdle is the bandwidth (bus width versus size) to transfer a context. There's also a company Stretch Inc. that had a 10 context device that could not virtualize contexts. Their devices have since become overly specialized. They have expiring patents that would teach their earlier devices. \$\endgroup\$ – user8352 Jun 12 '19 at 20:44
  • \$\begingroup\$ Ok, thank you for your answers. That was clarifying. \$\endgroup\$ – HastatusXXI Jun 13 '19 at 14:37

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