I am trying to read a huge number of digital inputs (129 to 800 and maybe more) at the same time. the sampling rate should be around 500K samples per second but I only need to read one of these inputs if there is a signal change (interrupt?). I am stuck at this for a long time and would really appreciate the help.
should I use 16 bit PISO shift-registers IC and a simple MCU but it seems that I will have to check every bit looking for a high signal?.
should I use an IO expander IC with SPI such as interface such as MCP23S17 but usually these have 3 bit address which mean I only could get away with 16*8=128 inputs. Another IO expander with greater IOs is MAX7301 but I am not sure how to use multiple ones and if it would affect the performance.
should I move to an FPGA for this sort of jobs given that I never touched one but I am ready confront my fears.
will multiplexers work or will they have their limits
could a hardware cascade of ICs solve this issue so I only recive the address of the changing bit with timestamp but how?
it is important to note that I need to keep the sampling time high in order to capture any change in one or at most 2 pins. please point me to the right direction as I am clueless and don't know what to do.