Sorry if this question has been asked before, I've tried looking through google and Stack Exchange and I can't seem to find the answer.
Resistors on the gate (R3 on the picture) are usually in the K ohms with good reason. The part I don't understand is the voltage drop that to my knowledge should occur to that resistor due to it being in series. Considering the other side of the resistor after the mosfet is connected to the ground, wouldn't applying let's say 5V to the left side of R3, where the OUT pin on the picture is, make all the current go through the resistor and nothing left for the mosfet ?
I'm guessing my assumption is wrong and the other side of the gate is not connected to the ground, or I simply don't understand how a PMOS works well enough, but basically I don't get how Vgs(th) could ever get enabled considering there is a high resistance resistor in front of the gate.
Sorry for the stupid question, I don't exactly know what to ask on google and I've been at it for a couple hours looking and can't find a good answer.
Thank you !
Image is taken from this Stack Exchange link