How can this logic be formed by using the Karnaugh map?

Question

I’m trying to implement a circuit by using logic gates where the output is ON only one of the three inputs is available.

Below I wrote down the corresponding truth table and the Karnaugh map for the inputs A, B and C:

Now in this Karnaugh map there is no grouping possible. How can we proceed to form a logic from this point?

Edit:

Here is what I came up with if not wrong:

But this circuit requires 6 AND gates and 2 OR gates.

Is this the limit for simplification? Can this be simplified more?

Edit 2:

Logisim simulation:

Answer 1

There is a way to simplify further if you're allowed to use other logic gates than OR and AND. "Diagonal" ones like in the first 4 cells indicate, that some XOR logic gates can be applied. Since KV-Diagrams are toruses the diagram can be rewiritten as follows:

┌──────┬────┬────┬────┬────┐
│ A/BC │ 01 │ 00 │ 10 │ 11 │
├──────┼────┼────┼────┼────┤
│    0 │  0 │  1 │  0 │  0 │
│    1 │  1 │  0 │  1 │  0 │
└──────┴────┴────┴────┴────┘

This reveleals another diagnonal structure, so we can begin to group them together. The first and the second colums are 1, when A and C are equal. This means a XNOR connection: $$\bar{ (A \oplus C) }\land\bar{B}$$ Same goes for the second and third row but with A and B: $$\bar{ (A \oplus B) } \land\bar{C}$$ So the whole expressions boils down to: $$(\bar{ (A \oplus C) } \land\bar{B}) \lor (\bar{ (A \oplus B) }\land\bar{C})$$

Two XNOR gates, Two AND gates and one OR gate.