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I want to use an Analog Devices LDO regulator (ADP7104ARDZ-5v.)

When I checked the datasheet, I found out that it requires just a 1uF capacitor on the output pin. Then I searched more and I found an evaluation board (EV-ADF4159EB1Z) that this regulator had been used on. On the evaluation board, there is a 4.7uH inductor, a 0.33 ohm resistor, and a 100 uF capacitor rather than just the 1uF recommended in the datasheet.

I want to know why they used a very low value resistor together with a high value capacitor.

Here is the circuit from the evaluation board:

enter image description here

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  • \$\begingroup\$ welcome to SE EE! Instead of asking "why these values" ask youself, "why are these components there in the first place?" What do they do? Do you need that as well? Hint: that evaluation board is a PLL evaluation board. It contains a PLL with lots of nasty clocks and digital circuits switching. If you do not have that then the components might not be needed. When the datasheet says 1uF at the output is all that is needed then usually it is. \$\endgroup\$
    – Bimpelrekkie
    Jun 17, 2019 at 12:52
  • \$\begingroup\$ thank you @Bimpelrekkie \$\endgroup\$
    – parisa-far
    Jun 18, 2019 at 5:20
  • \$\begingroup\$ oh yes. the LP filter! actually I didn't think about filters at all. I just thought about the smoothing capacitor of the output voltage. thank you million times @JRE \$\endgroup\$
    – parisa-far
    Jun 18, 2019 at 5:27

3 Answers 3

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Linear regulators have stability requirements for the output capacitors, you can find the requirements in the datasheet. The ADP7104 datasheet specifies a minimum of 1µF effective capacitance and a maximum of 1R ESR. It's also quite common to have a minimum ESR as well, it really depends on the regulator circuitry and you have to check it in advance.

This is the same principle as in the well-known SMPS feedback loop design but usually a lot easier to manage.

The large output capacitor improves step response, you can find in the datasheet an example of step response with the 1µF capacitor. In your circuit 10µF is the actual regulator output capacitor, 4.7µH inductor + 100µF capacitor are a low-pass filter. The 0.33R might be there to dampen the LC circuit spikes at resonant frequency.

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The evaluation board is for a very sensitive circuit, that needs an extremely clean power source.

The additional components form a low pass filter at the output of the regulator.

The inductor and the capacitor make a low pass filter with a cutoff frequency around 15kHz.

The small resistor is probably there because the ADP7104 probably requires that the output capacitor have a small amount of series resistance to keep it from oscillating - many parts that were designed before low equivalent series resistance (ESR) ceramic capacitors depended on the innate resistance of the capacitor. I can't say for sure, though, since my phone has a problem downloading the ADP7104 datasheet.

The resistor may also be there to reduce oscillation (more correctly, "ringing") in the LC circuit.

EDIT
Finally got to look at the datasheet. As @Hearth mentioned in the comments, the ADP7104 is made for use with low ESR ceramic capacitors. That makes it much more likely that the series resistor is there to reduce ringing in the filter.

In any case, you can follow the recommendation in the ADP7104 datasheet and go with just the 1uF capacitor - unless you know for certain that you need the extra filtering as used on the PLL evaluation board you were looking at.

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  • \$\begingroup\$ I just went and looked at the datasheet. It says "any good quality ceramic capacitors can be used [...] as long as they meet the minimum capacitance [1 μF] and maximum ESR [1 Ω] requirements." (linked datasheet, page 17, bottom of first column) It then goes on to talk about capacitance variation with voltage in ceramic capacitors. \$\endgroup\$
    – Hearth
    Jun 17, 2019 at 14:15
  • \$\begingroup\$ @Hearth, it might operate in spec with any low ESR capacitor. But whoever designed the eval board (probably someone from the PLL group, not the LDO group) found that it works better with the additional filter. \$\endgroup\$
    – The Photon
    Jun 17, 2019 at 15:07
  • \$\begingroup\$ @ThePhoton Right. I was just providing the relevant information from the datasheet as JRE stated they were unable to access it. \$\endgroup\$
    – Hearth
    Jun 17, 2019 at 15:18
  • \$\begingroup\$ Thanks @Hearth for the reminder about this question. I'm at home now, and can finally download the datasheet. Quite right about the ceramic capacitor. I've edited my answer. \$\endgroup\$
    – JRE
    Jun 18, 2019 at 8:21
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Most EVM's will do everything to make their part preform the best (lowest noise, ripple, efficiency, etc). So in your app you might get away with the minimum, a single 1uF output cap.

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