I found a photo in my grandfather's effects that I believe to be of an RF GaAs FET. He was working in a GaAs FET lab at the time this photo was dated (1975). It was labeled on the back "300μm gate width on mesa".

I believe it was related to US Patent US4160984A filed in 1977; he is listed as one of the inventors.

The structure is foreign to me; where are the gate, source, and drain? Any additional information on the structure would be appreciated.


  • \$\begingroup\$ Typically, a FET is modeled from left to right as "Source, Gate, Drain" but I can't back that up since there is no sufficient documentation that is provided and the picture could be backwards. The structure is very symmetric. That's really neat that your grandfather was part of that :) My grandfather was an electrical engineer that worked on the Apollo guidance systems for NASA. \$\endgroup\$ – KingDuken Jun 19 '19 at 19:33

Here's an annotated version of what is what, from my experience laying out GaAs and GaN HEMTs:

enter image description here

You can see the gate finger peeling off of either side of the two gate contacts if you look closely. I can't tell which side is drain, which side is source, but if it's a symmetric device, they aren't any different physically (e.g. a FET designed for switch applications). My guess is that the dashed-line box is the mesa region.

Very cool photo and background :)

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    \$\begingroup\$ Indeed, it is. That long thin strip forms a Schottky contact with the GaAs epitaxy it is deposited on. \$\endgroup\$ – Shamtam Jun 21 '19 at 16:52
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    \$\begingroup\$ Judging from the patent, it looks like the "bubbly" part of the source and drain contacts (inner box) is the AuGe contact, and the fair metal on the gate and the extent of the the contact is the Al Schottkey contact for the MESFET structure. Top right contact is probably ohmic substrate contact, top middle is maybe ohmic mesa contact. Top middle may be a test contact to ohmic mesa contact \$\endgroup\$ – W5VO Jun 21 '19 at 16:54
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    \$\begingroup\$ I think what you marked "Mesa" may be the thinning etch on the mesa, and the mesa may be the larger extent (item 28 on Fig. 4 in the patent). If so, that would make the top contact a source, as it has an ohmic contact across the mesa to the substrate, while the bottom ohmic contact might not cross the mesa. \$\endgroup\$ – W5VO Jun 21 '19 at 16:57
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    \$\begingroup\$ @W5VO Yes, I agree. Upon further reading of the patent, it seems the term used is "inverted mesa" which confused me; more common terminology to me is to call this sort of structure a recessed-gate FET (which is pretty standard for GaAs FET to reduce layouts). I'll make some updates shortly. \$\endgroup\$ – Shamtam Jun 21 '19 at 17:08
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    \$\begingroup\$ No worries, I was looking at it, and was going to write something over lunch when your answer popped up \$\endgroup\$ – W5VO Jun 21 '19 at 17:10

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