# How to avoid the saturation of the current amplifier?

I have to calculate current gain of the following circuit and to model it in Spice. I arbitrarily set Is = 0.0002 A: Here are the results provided by LTSpice: Also, in order to find an equation for current gain, my first idea was to transform Is and its parallel 5k resistor to a combination of voltage source (Vs = Is*5000 Ohm = 1V) and series 5k resistor. In this case the voltage at inverting input is Vy = Vx = 0.33*Vout, and the output voltage itself can be found according to following equation: (Vs - Vy)/5000 = (Vy - Vout)/20000. Strangely, the results provided by LTSpice become quite disturbing when I increase the voltage to 2V (or current to 0.0004 A): The same happens when I increase the value of 5k or 2k resistors. As you can see, I had a good luck arbitrarily choosing Is value as 0.0002 A. Otherwise, I could have very hard times. In general, if I keep all the resistors as they are and don't increase the current above 0.0004 A, then the output voltage can be calculated following these equations:

(5k*I1 - 1/3Vout)/5k = (1/3Vout - Vout)/20k;
6R*Is = Vout;
6*5000*0.0002 = 6 V;


My question is: how to correctly select voltage/current source and resistor values in order to avoid op-amp saturation?

• How did you get the $2\:\text{V}$ for $V_3$? – jonk Jun 24 '19 at 7:05
• @jonk , I mistaped. And it works! – tenghiz Jun 24 '19 at 7:15
• You are good, then! – jonk Jun 24 '19 at 7:28
• @jonk, please, can you take a look once again on my question? – tenghiz Jun 24 '19 at 7:44
• The opamp in your diagram isn't stable. If the output were to slightly rise, for example, this would increase the voltage at the (+) input node. But this would then cause the opamp to raise its output voltage. Which would increase the (+) input node, still more. It will "hit the rails," in this arrangement. If you hook up the $R_3$ and $R_4$ divider node to the (-) input, instead, then this aspect of the problem is fixed. – jonk Jun 24 '19 at 8:24

If you solve the circuit, you'll find the reason why it's not stable:

$$\V_+\$$ and $$\V_-\$$ being the positive and negative terminal of the opamp

$$V_+ = V_{out} \frac{R_4}{R_3+R_4}$$ $$V_- = (V_{out}-V_3) \frac{R_1}{R_1+R_2} + V_3$$ $$V_{out} = A (V_+ -V_-)$$

$$V_{out} = A (V_{out} \frac{R_4}{R_3+R_4} - (V_{out}-V_3) \frac{R_1}{R_1+R_2} - V_3 )$$

$$V_{out} = A V_{out} (\frac{R_4}{R_3+R_4} - \frac{R_1}{R_1+R_2}) + A V_3 (\frac{R_1}{R_1+R_2} - 1)$$

$$\frac{V_{out}}{A} - V_{out} (\frac{R_4}{R_3+R_4} - \frac{R_1}{R_1+R_2}) = V_3 (\frac{R_1}{R_1+R_2} - 1)$$

$$\lim_{A \to \infty} \frac{V_{out}}{A} - V_{out} (\frac{R_4}{R_3+R_4} - \frac{R_1}{R_1+R_2}) = V_3 (\frac{R_1}{R_1+R_2} - 1)$$

$$- V_{out} = V_3 \frac{ (\frac{R_1}{R_1+R_2} - 1) }{ (\frac{R_4}{R_3+R_4} - \frac{R_1}{R_1+R_2}) }$$

$$- V_{out} = V_3 \frac{ R_2 }{ (\frac{R_4(R_1+R_2)}{R_3+R_4} - R_1 ) }$$

$$- V_{out} = V_3 \frac{ R_2(R_3+R_4) }{ (R_4(R_1+R_2) - R_1(R_3+R_4) ) }$$

$$V_{out} = - V_3 \frac{ R_2 R_3 + R_2 R_4 }{ R_4 R_2 - R_1 R_3 }$$

• Where do these equations come from? – tenghiz Jun 24 '19 at 8:40
• From your 3rd or 4th posted schematic. – Huisman Jun 24 '19 at 8:41
• I mean, where does the idea to calculate separately the voltages for op-amp inputs and then to calculate a limit comes from? I use "Electric circuits" of Alexander/Sadiku and had no idea of this method. – tenghiz Jun 24 '19 at 8:46
• I can't remember. I'll check up my old textbooks and provide a reference. But I might as well have made up the technique myself. – Huisman Jun 24 '19 at 8:51