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charging regulator

This is a charging regulator, and with over voltage regulation across Cload, which is used to provide power for up to 3ms in case of a power micro cut.

What I do understand in this schematic :

  • How the current limiting works with the PNP and PMOS, using the 10V zener to bias the gate

  • How it is necessary to have current flowing in the 33V zener to keep it in its breakdown region

Simulating, the current across D33V is 16uA when input voltage is at 72V, this allows to regulate the voltage across Cload at about 33.65V, which is D33V + the NPN's Vbe.

What I don't understand, and what I'd like you to help me with is why we don't just use a zener, and a series resistor to keep the current in an acceptable range? I've tried to simulate such a circuit, using a resistor that would put the current through D33V at about the same as the current design (16 uA), and the zener can't regulate. It will only regulate across Cload when approx. 100mA is flowing through it, which is unacceptable in terms of power dissipation. I don't understand the reason why it doesn't work.

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The voltage regulation is achieved by using the zener as more of a reference than a standalone regulator and as part of an overall feedback loop.

As the output starts to rise above the desired set point (about 33.7V), the base of the NPN will be pulled up (The zener will maintain about 33V across itself), causing the collector voltage to go down; this will, in turn, pull down the base of the PNP.

That will cause the collector voltage of the PNP to rise, causing the gate of the PMOS pass element to also rise, which will start to turn it off (it is actually going to increase the pass element resistance). This increase of resistance will cause the excess voltage from the source to be dropped over the PMOS device.

The PNP is therefore part of both the current limit and output voltage regulation scheme.

The 10V zener across the gate to source of the PMOS device is to prevent the gate voltage exceeding a safe level

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