I have an FT232R chip hooked up to my oscilloscope with the TX and RX pins joined. I'm sending characters directly to it via Putty. The logic levels I am seeing are 5V low and 0V high. I thought the output of this chip was TTL (i.e. 0V low and 5V high)? Am I missing something?

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    \$\begingroup\$ In UART communication, the idle, no data state is HIGH. The start bit is logic LOW, followed by multiple bits of data, and a HIGH stop bit. Is it consistent with what you are seeing? en.wikipedia.org/wiki/… \$\endgroup\$ – 比尔盖子 Jun 24 '19 at 19:25
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    \$\begingroup\$ 0V and 5V are TTL levels ... you are missing the fact that logic signals have active levels ... for example an active low means that 0V = logic 1 \$\endgroup\$ – jsotola Jun 24 '19 at 19:30
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    \$\begingroup\$ @比尔盖子 - Absolutely correct. For some reason I assumed that no data state would be LOW. +1 for an interesting fact about the historical legacy relating to telegraphy. \$\endgroup\$ – Joe Mann Jun 24 '19 at 19:31

UART communication uses positive logic. In TTL, logic 1 is 5V, logic 0 is 0V. However, in UART, the idle, no data state is 1/HIGH, not 0/LOW. What you are seeing here is not inverted logic level, but simply an idle UART line.

The Wikipedia article on Universal asynchronous receiver-transmitter has a good explanation.

Data framing: The idle, no data state is high-voltage, or powered. This is a historic legacy from telegraphy, in which the line is held high to show that the line and transmitter are not damaged. Each character is framed as a logic low start bit, data bits, possibly a parity bit and one or more stop bits. In most applications the least significant data bit is transmitted first.

For completeness, here's an example. I'm sending ASCII character "U" (01010101) via UART, 1 start bit, 8-bit data, no parity, 1 stop bit, 9600 baud.

On an oscilloscope, you will see the following waveform. Because the least significant data bit is transmitted first, binary digits of ASCII U is reversed.

UART on Oscilloscope


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