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I have a voltage divider that is driving the gate of a high side PMOS switch. The voltage divider turns the PMOS on once the NMOS is turned on by a 5v logic controller. The PMOS turns on instantaneously, but it takes 9 milliseconds for it to turn back off(9ms for Vout to reach 0v again). At first I thought it must be my resistor values so I changed them to R2=47 Ohms and R1=470 Ohms, but it was still taking 9 milliseconds for the PMOS to turn off.

I think my issue might be similar to this question: Slow PNP turn-off time, how to optimize it

But my R2 should be acting as a pull-up resistor already, so I'm not sure how to decrease the turn-off time of the PMOS. enter image description here

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    \$\begingroup\$ Active pull up and pull down is what you need. A passive, resistive pull up isn't going to be as fast. \$\endgroup\$ – jonk Jun 24 at 19:35
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    \$\begingroup\$ How long does it take the gate of M2 to rise to 80V when M1 is switched off? What is connected to Vout that would make the voltage ever go to ground? How fast does the Vout drop if you connect a fixed resistor, maybe a 1 kilohm, 1 watt, from Vout to ground instead of whatever is normally connected there? \$\endgroup\$ – Elliot Alderson Jun 24 at 20:01
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    \$\begingroup\$ The RC response time depends on dV/dt=Ic/C neither these nor FET or cable are stated. \$\endgroup\$ – Sunnyskyguy EE75 Jun 24 at 20:09
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    \$\begingroup\$ @evildemonic I've updated the schematic with the FET components I was using. PMOS is IRF9540NPBF \$\endgroup\$ – tinker102 Jun 24 at 20:33
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    \$\begingroup\$ If you have nothing but an oscilloscope probe connected at Vout then it is certainly going to take a long time to get to ground. What will normally be connected to Vout? \$\endgroup\$ – Elliot Alderson Jun 24 at 21:12
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To properly measure the fall time of Vout you need to connect something to that point that will pull the voltage down...the PMOS transistor can only pull Vout high. With just an oscilloscope probe connected to Vout the fall time will be very slow, because the oscilloscope probe is intentionally designed not to alter the circuit voltage.

If you just want to test your circuit without connecting the real load to Vout, you can temporarily connect a resistor between Vout and ground. In this case, a 1k\$\Omega\$, 1W, resistor might be a good choice.

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Companies that make MOSFET devices often publish useful papers called application notes (or white papers, or bench notes, etc.) to help engineers better understand these devices. Listed below are three examples. I also recommend an Internet search using keywords like "MOSFET switch capacitive load".


Texas Instruments
Application Report SLVA883
Timing of Load Switches
http://www.ti.com/lit/an/slva883/slva883.pdf

Vishay Siliconix
Device Application Note AN608A
Power MOSFET Basics: Understanding Gate Charge and Using it to Assess Switching Performance
https://www.vishay.com/docs/73217/an608a.pdf

ON Semiconductor
Application Note AND9093/D
Using MOSFETs in Load Switch Applications
https://www.onsemi.com/pub/Collateral/AND9093-D.PDF


And in addition to everyone else's comments, I suggest you also consider whether to manage the inrush current into the 2200 μF capacitance that's connected to node Vout. If you can, perform a SPICE simulation—e.g., LTspice, OrCAD, etc.—on this circuit with the capacitor initially discharged. You'll find that the 80 V power source, and PMOS transistor M2, and the 2200 μF capacitor must endure a sustained inrush current of about 23 A for about 8 ms when M2 turns on. Parasitic inductance in the PCB traces and in the capacitor should also be considered in circuit nodes where large transient currents are present. See also: negative temperature coefficient (NTC) thermistors; "soft start" circuits/ICs.

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