1
\$\begingroup\$

The textbook I currently read defines cut-off for PNP germanium transistors like this:

For germanium transistors, however, cutoff for switching purposes will be defined as those conditions that exist when \$ I_C = I_{CBO} \$

and they continue saying that:

This condition can normally be obtained for germanium transistors by reverse-biasing the base-to-emitter junction a few tenths of a volt.

whereas for silicon transistors it is said that:

Since \$ I_{CEO} \$ is typically low in magnitude for silicon materials, cutoff will exist for switching purposes when \$ I_B = 0 mA \$ or \$ I_C = I_{CEO} \$ for silicon transistors only.

where $$ I_{CEO} = I_{CBO} / (1 - \alpha) | when I_B = 0 $$

and where \$ \alpha = I_C / I_E\$

So, my question is why is the condition for cut-off \$I_{CEO}\$ for silicon transistors and \$I_{CBO}\$ for germanium ones, even though both of them are operated in the same configuration (Common Emitter).

And also why are they talking about reverse biasing germanium transistors when cut-off already means base-to-emitter junction is reverse biased?

My initial thoughts are that for germanium \$I_{CEO}\$ is high, so that's why \$I_{CBO}\$ is needed.

\$\endgroup\$
  • \$\begingroup\$ do these two materials have different avalance behaviors? \$\endgroup\$ – analogsystemsrf Jun 27 at 9:27
  • \$\begingroup\$ probably yes. But what does it have to do with cut-off region ? \$\endgroup\$ – Allen Jun 27 at 10:08

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Browse other questions tagged or ask your own question.