# How many transistors are there in a logic gate?

How many transistors are there in a logic gate?

If anybody asks me, I tell them:

• A NOT gate is 1 transistor.
• A NAND gate is 1 transistor per input.
• A NOR gate is 1 transistor per input.
• An AND gate is basically a NAND gate + a NOT gate, so it takes 1 transistor more than a NAND gate.
• Same for OR vs NOR.
• An XOR gate is built from multiple other gates, typically about ~4.

Sounds pretty reasonable, right? Thing is, I just realised... I have no idea why I think these are the correct numbers. I don't remember reading that somewhere or anything. I'm beginning to think maybe I just made it up. Sure, it sounds convincing; but that doesn't make it correct!

So what is the actual number of transistors per gate? I imagine it's different depending on which logic family we're discussing. (My brain is telling me that the numbers above are for TTL, and CMOS is exactly 2× the that, but again I don't know if there's actually a shred of truth to that.) If it does make a difference, I'm most interested in TTL and CMOS.

• There were 5 types of TTL and now over 30 types of CMOS. This question may have been relevant 50 years ago with RTL. Commented Jun 29, 2019 at 15:53
• You can make a NOT gate with 1 transistor but there are very good reasons not to. You can make an N[input NAND or NOR with one transistor (and N diodes) - likewise. (You can make gates without any transistors at all, if you are allowed to play with vacuum tubes...) Ignoring the last, look at RTL and DTL (Resistor and Diode-Transistor Logic) which preceded TTL.
– user16324
Commented Jun 29, 2019 at 15:57
• Yes a chip/part like 74HC04 uses buffers, but there are also unbuffered chips like 74HCU04. OP was talking just about gates themselves, not about specific chips implementing a logic function as that will differ. Chips will certainly contain other elements as well, such as protection diodes, ESD clamps etc. Commented Jun 29, 2019 at 16:25
• I see your reasoning. I would count the buffer just as being the output stage for the output pin. There is little reason to put buffers there if the signal is internal on the same die and only goes to an input of another logic gate. Sometimes buffers are needed on internal signals though, so indeed it will vary. Commented Jun 29, 2019 at 16:38
• Just to add to the confusion, see an RTL NOR. That uses just one transistor. It might "prefer" also a negative voltage rail rather than simply ground. But it can be achieved without dual supplies, as shown there.
– jonk
Commented Jun 30, 2019 at 5:08

If you are making gates out of discrete transistors, diodes and resistors, you can make an inverter with one transistor, a NAND with two transistors, or with diodes.

If it is in a integrated circuit, where a resistor is more complex to make than a transistor, more transistors are used either for polarisation (for example ni old NMOS), or now as part of more complex circuits with complementary logic such as CMOS. A basic CMOS inverter uses 2 transistors. Inputs can be added by using transistors with several gate contacts.

It works when that gate is one among many others, driving a few similar gates. For large fan-out gates, or when these gates are sold as components, like a 7400 or a HC4000, there are additional transistors, with different geometries for conditioning the input, multiply the output current rating.

See the first answer to this question. It shows a TTL inverter circuit with a totem-pole output; there are four transistors. A TTL NAND gate would also have four transistors, but the input side would have a dual-emitter transistor.

An unbuffered CMOS inverter has just two transistors, yes, but a buffered inverter will have more (either four or six, I can't remember which, or perhaps it varies).

It depends on the logic family, it also depends on what exactly you count as a transistor.

For a basic unbuffered CMOS NAND/NOR/NOT you have two transistors per input.

For an unbuffered NMOS or PMOS NAND/NOR/NOT you have one transister per input, but you also have a pullup or pulldown, this pullup or pulldown can be a resistor, but it's more commonly a weak transistor.

Many practical discrete gates will be buffered, that is they will have additional inverter stages added to improve the output drive strength and prevent the drive strength depending on which combination of inputs are active.

TTL is more complex, a basic TTL NAND gate has two transistors, plus some resistors, but one of those transistors is a special one with two emmitters, furthermore many TTL gates have a "totem pole" output which adds an extra transistor or two. In TTL NOR is substantially more complicated than NAND, so it's often avoided.