# A 4bit counter that goes up and down

I am kinda new to the website, I just came across it after looking for answers for such a long time. I have an assignment that asks to add an input bit to your circuit from the circuit I created that goes up my sequence of 3 up to 15 called U (for up). If U is a 1, your circuit should count up through the sequence of multiples of 3 as normal. If U is a 0, your circuit should count down through the sequence of multiples of 3 (0, 15, 12, ..., 6, 3, 0, 15, 12...). I was able to draw the truth table and the K maps both for going up and down but I don't know how to implement the input circuit. For this assignment, we use a program called Logisim. Please let me know if extra information is needed

This is the counter going up This is the counter going down

• yes, we need more information ... please tell us what is your question Jun 30, 2019 at 4:28
• How do I make the counter go up and down? I understand that I need an input wire but what does it connect to and how? Jun 30, 2019 at 4:34
• @YousefWally Are you allowed to use any component? Or are there limitations to what you can and cannot use in Logisim? Also, note that going between 0 and 15 (either direction) isn't adding or subtracting 3, mod 3. It's adding or subtracting 1. So there is a slight complexity there. Specifically, I'm wondering if you are allowed to use a T-type FF (JK wired appropriately?) (Look at this answer for an example of how to proceed with your project.)
– jonk
Jun 30, 2019 at 4:57
• overlay the two circuits and add gates to allow switching between the two layouts. under control of the U line. Jun 30, 2019 at 9:44

Here's the state transitions:

$$\begin{array}{c|c|c|c|c} \text{State} & \text{U=1 Next} & \text{U=1 Excite} & \text{U=0 Next} & \text{U=0 Excite}\\\\ {\begin{smallmatrix}\begin{array}{cccc} Q_D & Q_C & Q_B & Q_A\\\\ 0&0&0&0\\ 0&0&1&1\\ 0&1&1&0\\ 1&0&0&1\\ 1&1&0&0\\ 1&1&1&1\\\\ 0&0&0&1\\ 0&0&1&0\\ 0&1&0&0\\ 0&1&0&1\\ 0&1&1&1\\ 1&0&0&0\\ 1&0&1&0\\ 1&0&1&1\\ 1&1&0&1\\ 1&1&1&0\\ \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{cccc} Q_D & Q_C & Q_B & Q_A\\\\ 0&0&1&1\\ 0&1&1&0\\ 1&0&0&1\\ 1&1&0&0\\ 1&1&1&1\\ 0&0&0&0\\\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{cccc} T_D & T_C & T_B & T_A\\\\ 0&0&1&1\\ 0&1&0&1\\ 1&1&1&1\\ 0&1&0&1\\ 0&0&1&1\\ 1&1&1&1\\\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{cccc} Q_D & Q_C & Q_B & Q_A\\\\ 1&1&1&1\\ 0&0&0&0\\ 0&0&1&1\\ 0&1&1&0\\ 1&0&0&1\\ 1&1&0&0\\\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ \end{array}\end{smallmatrix}} & {\begin{smallmatrix}\begin{array}{cccc} T_D & T_C & T_B & T_A\\\\ 1&1&1&1\\ 0&0&1&1\\ 0&1&0&1\\ 1&1&1&1\\ 0&1&0&1\\ 0&0&1&1\\\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ x&x&x&x\\ \end{array}\end{smallmatrix}} \end{array}$$

Once you have that much, all you need to do is to lay out four K-map tables for each condition of $$\U\$$.

For $$\U=1\$$ (count up):

$$\begin{array}{rl} \begin{smallmatrix}\begin{array}{r|cccc} T_D&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&0&x&0&x\\ \overline{Q_D}\:Q_C&x&x&x&1\\ Q_D\: Q_C&0&x&1&x\\ Q_D\:\overline{Q_C}&x&0&x&x \end{array}\end{smallmatrix} & \begin{smallmatrix}\begin{array}{r|cccc} T_C&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&0&x&1&x\\ \overline{Q_D}\:Q_C&x&x&x&1\\ Q_D\: Q_C&0&x&1&x\\ Q_D\:\overline{Q_C}&x&1&x&x \end{array}\end{smallmatrix}\\\\ \begin{smallmatrix}\begin{array}{r|cccc} T_B&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&x&0&x\\ \overline{Q_D}\:Q_C&x&x&x&1\\ Q_D\: Q_C&1&x&1&x\\ Q_D\:\overline{Q_C}&x&0&x&x \end{array}\end{smallmatrix} & \begin{smallmatrix}\begin{array}{r|cccc} T_A&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&x&1&x\\ \overline{Q_D}\:Q_C&x&x&x&1\\ Q_D\: Q_C&1&x&1&x\\ Q_D\:\overline{Q_C}&x&1&x&x \end{array}\end{smallmatrix} \end{array}$$

For $$\U=0\$$ (count down):

$$\begin{array}{rl} \begin{smallmatrix}\begin{array}{r|cccc} T_D&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&x&0&x\\ \overline{Q_D}\:Q_C&x&x&x&0\\ Q_D\: Q_C&0&x&0&x\\ Q_D\:\overline{Q_C}&x&1&x&x \end{array}\end{smallmatrix} & \begin{smallmatrix}\begin{array}{r|cccc} T_C&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&x&0&x\\ \overline{Q_D}\:Q_C&x&x&x&1\\ Q_D\: Q_C&1&x&0&x\\ Q_D\:\overline{Q_C}&x&1&x&x \end{array}\end{smallmatrix}\\\\ \begin{smallmatrix}\begin{array}{r|cccc} T_B&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&x&1&x\\ \overline{Q_D}\:Q_C&x&x&x&0\\ Q_D\: Q_C&0&x&1&x\\ Q_D\:\overline{Q_C}&x&1&x&x \end{array}\end{smallmatrix} & \begin{smallmatrix}\begin{array}{r|cccc} T_A&\overline{Q_B}\:\overline{Q_A}&\overline{Q_B}\: Q_A&Q_B \:Q_A&Q_B \:\overline{Q_A}\\ \hline \overline{Q_D}\:\overline{Q_C}&1&x&1&x\\ \overline{Q_D}\:Q_C&x&x&x&1\\ Q_D\: Q_C&1&x&1&x\\ Q_D\:\overline{Q_C}&x&1&x&x \end{array}\end{smallmatrix} \end{array}$$

You can now use those tables (fixed for errors I made above that you may catch) to develop the logic required.

From the above, I find:

\begin{align*} T_D &= U\cdot Q_B\cdot Q_C + \overline{U}\cdot \overline{Q_B}\cdot \overline{Q_C}\\ T_C &= U\cdot Q_B + \overline{U}\cdot \overline{Q_A} + Q_A\cdot \overline{Q_B} \\ T_B &= U\cdot \overline{Q_A} + \overline{U}\cdot \overline{Q_C} + Q_A\cdot Q_C \\ T_A &= 1 \end{align*}

At this point, you should be able to easily develop the logic required when using T-type FF devices.