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So i am studying TTL circuits and i started with fundamental configuration as shown in the following picture.

enter image description here

NOTE: Transistor Q1 is actually a two emitter transistor, i just couldn't find proper symbol when i was drawing this circuit, however, thats not too relevant to the question i am asking.

Let's say that Vin is at low state, 0.2V for example, that would mean that voltage at base of Q1 is about 0.9 volts, which would mean that we have a significant current at the base of transistor, 4mA approximately, that would mean that transistor is either in direct active mode or in saturation, with second option being more likely, since this base current is for most transistors above the saturation current, which means that collector current of Q1 is not very high, yet it exists and goes from collector to emitter.

Now, considering this configuration, that would mean that current flows out of base of Q2, which means that Q2 has a negative base current, and don't know what is going on with transistor when it has negative base current, so my questions are:

How this situation is affecting Q2 transistor? What would happen when Q1 is in direct active mode, having significant collector current, how it would affect Q2 transistor?

Any help appreciated!

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  • \$\begingroup\$ Current does not flow out of Q2's base. Think again. \$\endgroup\$
    – Andy aka
    Commented Jul 4, 2019 at 8:10
  • \$\begingroup\$ Determine all PN junctions of Q1 \$\endgroup\$
    – Huisman
    Commented Jul 4, 2019 at 8:46
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    \$\begingroup\$ I briefly watched this video (youtube.com/watch?v=FuhsaWKBX_A), not sure if it's completely correct, but I think at least helpful. \$\endgroup\$
    – Huisman
    Commented Jul 4, 2019 at 8:50
  • \$\begingroup\$ @Andyaka how so, i mean, if Q1 is saturated, then it has a collector current that is not dependent on base current, however it still exists. \$\endgroup\$
    – cdummie
    Commented Jul 4, 2019 at 10:13
  • \$\begingroup\$ @Huisman Well, we have base collector and base emitter pn junction, those are the juctions of a bjt-s in general, i 've watched that lecture, but still, i am not quite sure about this particular problem. \$\endgroup\$
    – cdummie
    Commented Jul 4, 2019 at 10:14

1 Answer 1

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The TTL gate is in either of two states. If its emitter is high (all of them), Q1 is cut off. Current flows through its B-C junction and turns on Q2, driving the output low.

If any of Q1's emitters is pulled low, then it conducts, pulling the base of Q2 low. There is a small transient current when this occurs, but no DC current. Since the base of Q2 is actively pulled low through a low impedance, it switches faster than it otherwise might.

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  • \$\begingroup\$ Actually the TTL inverting gates can be biasing "linearly", to get about 20dB gain. \$\endgroup\$ Commented Jul 4, 2019 at 13:04

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