3
\$\begingroup\$

For my current project I am adding an M.2 slot for additional storage. Even though SATA data throughput is more than sufficient I would like to support both SATA and PCIe based SSDs, as I dont know what will be more/less available and affordable in future.

M.2 Keys

The M.2 connectors use keying notches in different positions, depending on the provided interfaces. Each key position is identified by a letter.

  • Key B: SATA + PCIe x2 (+ others)
  • Key M: SATA + PCIe x4

A quick search for M.2 SSDs on amazon showed that most NVMe/PCIe based SSDs use Key M, while SATA SSDs use a combined Key B and M. Therefore, for maximum compatibility, I need to use Key M.

Available System Interfaces

My system has one SATA and 2 PCIe lanes that may be connected to the M.2 receptacle, what is the requirement for Key B. I am missing 2 PCIe lanes for key M.

Plan

I plan to use the M key for maximum mechanical compatibility and would like to provide one SATA and 2 PCIe-Lanes on the M.2 connector.

Questions

  1. Do all NVMe/PCIe based SSDs work with 2 instead of 4 PCIe lanes?
  2. Is there a requirement on which PCIe lanes need to be used in this case?
  3. How may the two PCIe lanes that are not used be terminated?
\$\endgroup\$
1
  • 1
    \$\begingroup\$ From my limited experience, it's generally fine to leave unused device-side PCIe lanes floating, and that it's usually also fine to use less lanes than the device actually supports, of course at the cost of decreased maximum data rates. Dubious source: PC motherboards often have x16 slots with only x8 contacts populated. I'd expect you should also only use the first two in that case. I've also ran NVMe drives off PCIe x1 for the lack of IO in my machine. Note, this is just my speculation, which is why I've left it as a comment rather than an answer. \$\endgroup\$
    – Richard the Spacecat
    Jul 4, 2019 at 8:43

1 Answer 1

Reset to default
4
\$\begingroup\$

A card that has B and M notches is generally SATA, although it could be NVMe x 2 if the CONFIGx pins are set to that mode.

An M-notch card as a practical matter is strictly NVMe, and can be x1, x2 or x4.

There’s no issue with leaving PCIe lanes unconnected. The root complex will sense which ones are and power down the ones that aren’t.

The PCIe lane width negotiation starts from the max number of lanes and works its way down. Lane counts are always a power of 2. So a x4 M.2 card would be lanes 3-2-1-0. x2 would be lanes 1-0. x1 would be lane 0.

PCIe / NVMe can work over 1, 2 or 4 lanes. So if the host only has 1 lane, you can use that to connect an M.2 card.

\$\endgroup\$
3
  • \$\begingroup\$ Thanks for the reply. So if i want to support both, i have to take the M key for mechanical compatibility and use PCIe-lanes[1:0] as well as SATA. From what I read the CONFIGx pins are pulled low for SATA, but im not sure about the setup for NVMe. Also, it seems like the SATA and PCIe-lane0 share the same pins on the connector, I am not quite sure what to do here. Bus switch with a CONFIG signal as selection? \$\endgroup\$
    – L. Heinrichs
    Jul 4, 2019 at 11:36
  • 1
    \$\begingroup\$ It depends on the performance you're looking for. B key sacrifices two PCIe lanes for the physical key, while you get all four lanes with M key. If you're only using 1 or 2 lanes, then you could choose either B+M or M. If you want 4 lanes you need to use M key. A SATA card will have CONFIG1 (pin 69) as GND, it will be no-connect for NVMe. That is, for the card: SATA: CONFIG[3:0] = GND,GND,GND,GND PCIe: CONFIG[3:0] = GND,GND, open, GND \$\endgroup\$
    – hacktastical
    Jul 4, 2019 at 18:36
  • \$\begingroup\$ Just came back to this after some time. I used a Bus switch (NXP CBTL02042A) using the CONFIG1 pin with a pullup to select if SATA or PCIe signals should be used. As its still the design stage, nothing has been tested as of yet. \$\endgroup\$
    – L. Heinrichs
    Sep 16, 2019 at 10:19

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge that you have read and understand our privacy policy and code of conduct.

Not the answer you're looking for? Browse other questions tagged or ask your own question.