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schematic

simulate this circuit – Schematic created using CircuitLab

This is the schematic of the circuit but tried to find the gain of this circuit, assuming 50 % of the Duty Cycle for the LO, and M2 working on the saturation region. But i don´t know how to proceed exactly after that. My attempt was define VRF = Vgs(1+gm2Ron1)

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    \$\begingroup\$ If M2(the upper FET) works in sat-region, then that current is controlled by the lower FET. \$\endgroup\$ – analogsystemsrf Jul 7 at 16:11
  • \$\begingroup\$ i think you will find your answer if you look up a cascode amplifier which is the name for this configuration, not dual gate mosfet \$\endgroup\$ – DKNguyen Jul 7 at 21:08
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In order to find a simple expression that highlights the dependence of gm on the DC drain we neglect leakage:
\$ g_m =2I_D\sqrt {\dfrac {W}{D}μ_nC_{ox}}=\dfrac{2I_D}{V_{GS}-V_{GS_{Th}}}\$

Then Vrf gain is \$g_{m2}\dfrac{Rd}{2R_{On_1}}\$.

I think...

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