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I´m building an electronic load following this schematic.

My op-amp is an LM358 or LM324. My mosfet can be an IRFZ44N, and STW45NM50 or a IRFP460.

Those are the parts that are in my bin.

My question is that if adding a mosfet driver IC TC4420 between the output of the opamp and the gate of the mosfet will improve the switching response and reduce heat dissipation. Or in this application will be the same using or not the mosfet driver.

Thanks

Schematic

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  • \$\begingroup\$ Q? Where are your specs? \$\endgroup\$ Jul 8, 2019 at 17:36
  • \$\begingroup\$ @fabio Are you driving the mosfet on/off or at a constant voltage? What is the value of the voltage on the drain? \$\endgroup\$
    – Voltage Spike
    Jul 8, 2019 at 17:52
  • \$\begingroup\$ I´m driving the mosfet on and off through the output of the opamp. which compares the voltage in the non inverting input to the Vdrop in R4 (proportional to current). The voltage in the drain can be anything from 1.5V to even 48V, always not exceeding the mosfets power dissipation specs which I will limit to around 60W per mosfet (im planning on adding more mosfets in parallel. Each driven through his own opamp and/or TC4420) \$\endgroup\$ Jul 8, 2019 at 19:52

2 Answers 2

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Vgs =5V barely satisfies nominal FETs and not worst case to load with 5A.

Use 6V+ unregulated to power OA and Vds*Id * t * f * Rja will be your junction temp rise with t * f = duty cycle. You can then calibrate pot to go from 0 to 10% Imax or 10% to 50% to 100% with an input waveform. I would use an NPN open collector on OPAMP (Vin (+) to switch off current with any duty cycle form 0 to 100% for all your load regulation tests and use 50 ohm AC coupled cable and 50 Ohm terminator to measure ripple with 200MHz BW.

Then examine DCR, RdsOn, Cap ESR ratios to understand step voltage transient errors and consider what ESR and damping factor with compensation Lag/lead filter gives you the acceptable voltage error for your operating load requirements.

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  • \$\begingroup\$ Yes I'm planning on changing the +5V to +12V in order to achieve a gate voltage of at least 10V. But can a mosfet driver ic add some performance to the project or the mosfet can be driven efficiently through the OA directly? That's the main question. Thanks \$\endgroup\$ Jul 8, 2019 at 19:56
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    \$\begingroup\$ What dVgs/dt do you need? Look at current limit and Ciss \$\endgroup\$ Jul 8, 2019 at 20:31
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    \$\begingroup\$ dV/dt=Ig/Ciss= 1600uA/3800pf=0.5V/us you can boost this with complementary PNP+NPN Emitter followers inside OA feedback loop and fast if non saturating using hFE at unity gain for Q’s \$\endgroup\$ Jul 8, 2019 at 20:36
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You give no idea what load current or voltage you are building this electronic load for.

Of the devices you have:

  1. IRFZ44N is 55V, 35A, 94W
  2. STW45NM50 is 500V, 28A, 390W
  3. IRFP460 is 500V, 13A, 280W

From the above the best choice might be the STW45NM50 which would allow the greatest power dissipation in a single device, though you need a very large heatsink or liquid cooler to achieve high powers.

All the devices would be marginal at the 5V shown in your schematic, so raising this voltage to at least 8-12V would be required. The OPA188 will drive rail to rail on the output BUT is severely current limited. This will limit you slew rate, and you need to calculate this based on the GS capacitance for the device you use.

If you use a FET driver you will be able to get much larger slew rates, but with much added complexity.
For example, a simple low side driver such as the PM8841D will raise the gate drive capability to around +/-1A, but needs about a 16V supply to operate across the range.
Using bootstrap drivers is not required (and exceedingly difficult to build) for your application.

The schematic you show is only really suitable for DC load testing and not for dynamic slew rate testing. If you really want to go there things get much more complicated. Building a power stage for the opamp may however be the simplest way to achieve your goal.

For the devices you use, you need to ensure you have individual drivers as the VGS voltage will vary across devices, so my recommendation would be to use the device with the largest (single device) power capability as I refereed to above.

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  • \$\begingroup\$ Thanks Jack for the input, the main idea is to use this schematic as a DC load only. Firts I´m planning on building only one stage. (1 OPA 1 FET 1 RESISTOR) but for example to add more POWER I plan on using an LM324 driving 2 or more FETS (one for each output) that´s why I ask if it is convenient to add a mosfet driver IC in order to turn on the fet "faster" that the opamp will. Or since the FETS in this application will work in linear mode, a mosfet driver is useless. \$\endgroup\$ Jul 9, 2019 at 20:49
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    \$\begingroup\$ @FabioCesperes I'd suggest that a driver IC is out of scope. While it could be used with some post processing it would be easier to build a power stage after the opamp. It's also worth noting that RDS(on) is irrelevant for this type of application as is cap ESR ...you simply don't have the problem. \$\endgroup\$ Jul 10, 2019 at 2:32

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