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I am working on integrating a WM8731 audio codec chip with an AM335X processor. This is my first time working with I2S and I want to make sure I understand it correctly for configuring GPIO directions. In this configuration, the processor would be the master. This means that it would drive the both the TX and RX clocks as well as the word select lines (LRC). The only signal that the codec would drive is the ADC data channel.

Is this configuration correct?

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Reference documents:

AM335X TRM chapter 22

WM8731 datasheet

I2S Specification

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