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I'm building a 3 phase digital PLL and implementing it on a microcontroller. I included a schematic of the SRF-PLL principle that I use. SRF-PLL principle

The abc->dq0 transform is done so that the q component for a 3 phase balanced sine function is 0. Therefore, when the loop is locked, the q component should be 0.

\begin{align*} \begin{bmatrix} V_{d} \\ V_{q} \\ V_{0} \end{bmatrix} & = 2/3\begin{bmatrix} sin(\theta) & -cos(\theta) & 0 \\ cos(\theta) & sin(\theta) & 0 \\ 0 & 0 & 1\end{bmatrix} \ \begin{bmatrix} 1 & -1/2 & -1/2 \\ 0 & \sqrt{3}/2 & -\sqrt{3}/2 \\ \sqrt{2}/2 & \sqrt{2}/2 & \sqrt{2}/2 \end{bmatrix} \ \begin{bmatrix} V_{a} \\ V_{b} \\ V_{c} \end{bmatrix} \\ & \end{align*}

On the microcontroller environment, the PLL locks and the right frequency is found but very slight oscillations can be observed (ok fine). However, after "some time" the oscillations get their frequency divided by 2 and their amplitude is multiplied by 2. This is a phenomenon that occurs over a minute or two. enter image description here enter image description here enter image description here

I really can't explain what is happening and could really need some help.

PS: I had this occur in MATLAB at some point too, I got rid of it but I don't know how anymore.

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  • \$\begingroup\$ How do you avoid phase-accumulator overflow? \$\endgroup\$ Jul 17, 2019 at 5:29

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I found the problem, it had to do this actually, thanks a lot. Not overflow exactly but only the 1st integrator had a limitation built in. The 2nd didnt "overflow" but the values (in float) become less precise per decade, and this caused these strange ramps. A 2pi- periodicity on the integrator solved everything.

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