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I'm looking into writing a little software emulator that emulates/runs instructions.

The easiest would be to invent my own instruction set, but I thought it would be more fun if I write an emulator for an instruction set that already has a C++/C compiler.

What is the easiest instruction set/architecture that has a (hopefully stable) C++ and/or C compiler?

By easiest, I mean the least number of instructions.

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    \$\begingroup\$ Do you mean "what is the simplest instruction set that could have a C compiler?", or "what is the simplest instruction set that already exists and does have a C compiler?" The answers are different (the answer to the first is "anything that's Turing complete"). \$\endgroup\$ – TimWescott Jul 20 at 16:21
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    \$\begingroup\$ @appmaker1358 C arrived from 1969-1973, together with Unix. In the time I became involved with the Unix v6 kernel, circa 1978, Unix was going through a "portability" phase and the first published book on C also arrived (I still have my original copy from that year, since I needed to learn C to work on the Unix kernel.) The C development team got a PDP-11 (previously, C was in the process of deriving from B on the PDP-7) in 1970. It's arguable about where the ++ and -- operators came from. But I can, for sure, tell you that generating assembly code for the PDP-11 from C is pretty easy. \$\endgroup\$ – jonk Jul 21 at 8:12
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    \$\begingroup\$ @MarcusMüller I've just been lucky enough to work on some fun projects with some interesting people. \$\endgroup\$ – jonk Jul 21 at 18:39
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    \$\begingroup\$ @MarcusMüller There's no good way to make money being a pure basic physics researcher. A good friend, Dr. Saul-Paul Sirag, worked on M-theory (with Dr. Ed Witten, at times) and made about USD3k/yr! You can't live on that. I made money as a programmer. My interests remain with mathematics and physics and I've been lucky enough to secure some nice programming roles near people solving interesting physics problems. I've had the benefit of having my cake and eating it - paid good to work with great folks doing interesting physics and fun mathematics solving meaningful problems. Can't get better. \$\endgroup\$ – jonk Jul 21 at 18:56
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    \$\begingroup\$ This has now turned in to a question that's both a list question and unclear. The answers so far are disregarded due to some unwritten criteria of yours (suddenly you don't want a simple and small, you want at least 50 instructions and 32 bits. What else?) \$\endgroup\$ – pipe Jul 21 at 20:47
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Easiest would be to invent my own instruction set

uh, ok, we might come from very different experiences here…

With easiest I mean the least amount of instructions.

That's not necessarily the easiest to implement. Often, having more instructions is a good complexity tradeoff compared to having more complex instructions.

So my question is, what is the easiest instruction set/architecture that has a (hopefully stable) C++ and/or C compiler?

This sounds like no job for C++, so let's concentrate on C. (If you don't understand the difference having C++ RAII paradigm makes, you might not be in the optimum position to design your own ISA.)

Puh, some microcontroller instruction set that is early, but not too early (because too early would imply "designed around the limitations of digital logic of that time, like e.g. 8051).

AVR might be a good choice, though I personally don't like that too much.

I hear Zilog Z80 is easy to implement (there's really several Z80 implementations out there), but it's pretty ancient, and not very comfortable (being from the mid-70s).

If you really just want a small core to control what your system is doing, why not pick one of the many processor core designs that are out there?

For example, RISC-V is a (fairly complex) instruction set architecture, with mature compilers, and many open source implementations. For a minimal FPGA core, picoRV32 would probably the core of choice. And on a computer, you'd just run QEMU.

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    \$\begingroup\$ RISC-V on QEMU is an excellent option. Also, never knew about the Z80s. What don't you like about AVR? \$\endgroup\$ – Lucas Ramage Jul 20 at 13:59
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    \$\begingroup\$ It's just that I find the assembler unpleasant to write, and that a lot of the things people use large AVRs with hand-optimized assembler for could be done cheaper and quicker by writing C for a Cortex-M. But that opinion is historically based – in modern days, the ATtiny actually takes a sensible niche. \$\endgroup\$ – Marcus Müller Jul 20 at 14:03
  • \$\begingroup\$ C++ compiles to the exact same machine code as C. Any architecture with the features needed by C also has everything needed by C++. RAII has absolutely nothing to do with it. \$\endgroup\$ – Ben Voigt Jul 20 at 14:09
  • \$\begingroup\$ @BenVoigt point is that if you have a system that has a C++ compiler, chances are very high you'd want to use that to produce OS-targetting code. My reasoning iis that while libc can be pretty hefty, a C++ runtime that actually supports arbitrary C++ (instead of C++ with a lot of custom allocators and potentially std data structures you shouldn't use) does require a memory allocator, and that does influence your desire of your CPU supporting different addressing modes. I've written C++ for Renesas H8300 – it works, but it's really not "stuff for your first CPU". \$\endgroup\$ – Marcus Müller Jul 20 at 14:23
  • \$\begingroup\$ @MarcusMüller So... bare metal systems don't play well with most of the C++ library. How is that different from C? Dynamic allocation you've already mentioned but there are also file I/O, signals, Bessel functions... a whole bunch of stuff that you won't use unless it is absolutely essential to your project, because implementation on that hardware is so ridiculously inefficient. On the other hand, templates, RAII, namespaces, member functions are all highly useful for keeping a large software project maintained, no matter the size of the hardware that runs it. \$\endgroup\$ – Ben Voigt Jul 20 at 14:40
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You should take al look at the PIC microcontroller family. The instruction set is limited to 35 different instructions, while the controller is actually still used. Look at the datasheet at page 228: PIC16F datasheet

The controller is using 8 bits and is also available with less periphery, but that does not change anything for the instruction set.

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  • \$\begingroup\$ Pic is interesting, but I prefer something 32 bit. Do you know anything like that? \$\endgroup\$ – user138530 Jul 20 at 16:22
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    \$\begingroup\$ Well, I think basically all 32 bit cores are quite more complex in there design, but the MIPS instruction set has (in its initial form) something like 48 instructions. But I think in all relevant implementations this is increased to some extend by more modern versions of MIPS. \$\endgroup\$ – jusaca Jul 20 at 16:37
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You need a One Instruction Set Computer (OISC)

A one instruction set computer (OISC), sometimes called an ultimate reduced instruction set computer (URISC), is an abstract machine that uses only one instruction – obviating the need for a machine language opcode. With a judicious choice for the single instruction and given infinite resources, an OISC is capable of being a universal computer in the same manner as traditional computers that have multiple instructions. OISCs have been recommended as aids in teaching computer architecture and have been used as computational models in structural computing research.

Whether a compiler exists, I do not know. But I suspect some unlucky student somewhere has probably been assigned the task of writing one.

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    \$\begingroup\$ Okay, this is not really what I'm looking for. With as little instructions as possible, I meant within reason. I don't need as little as possible. I just don't want to implement 2000 different instructions. I hope for something with like 50 instructions. Also, 32 bit and c++. \$\endgroup\$ – user138530 Jul 20 at 16:24
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    \$\begingroup\$ Here is a C compiler that compiles to only MOV instructions: movfuscator \$\endgroup\$ – Paul Jul 21 at 9:44
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    \$\begingroup\$ @Paul: That's not a OISC. Multiple different opcodes share the same mov mnemonic on x86. (felixcloutier.com/x86/mov). Also, decoding x86 machine code with ModR/M + SIB addressing modes is not totally trivial. Compiling to mov instructions is pretty horribly inefficient, although so is any OISC. That probably makes debugging your emulator hard using any real compiler output, because grokking what the machine code is supposed to be doing is hard, and so is following it in your head. I'd go with a simple toy ISA like y86 or a subset of a RISC ISA like MIPS. \$\endgroup\$ – Peter Cordes Jul 21 at 15:04
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Donald Knuth's MMIX architecture has a 64-bit RISC instruction set with 256 opcodes and existing C compilers (GCC, actively maintained) and emulators (mixvm, etc.).

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I hope for something with like 50 instructions. Also, 32 bit and c++

The "Beta" architecture used in MIT's 6.004 core track class is a 32-bit RISC design often referred to as a simplification of the DEC Alpha. It's been implemented in many ways - personally in an FPGA - and at one time there was an old version of GCC for it, though that may at this point be challenging to dig up if no one is continuing to work with it.

One example of the architecture documentation is here, the full link will be retained as which year versions of the course are published online changes from time to time and it can be worth looking at several as different information may be included: https://ocw.mit.edu/courses/electrical-engineering-and-computer-science/6-004-computation-structures-spring-2009/labs/

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A simple instruction set of only 8 instructions used for teaching is known as the MU0 instruction set. It originated at Manchester University and is used for teaching both compiler writing and hardware design. There are several online documents describing it, including class notes at Manchester University.

Bibliography:

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    \$\begingroup\$ LC-3 is another such toy language for learning. \$\endgroup\$ – Nobody Jul 21 at 14:27
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My recommendation would be the LC-3 ("Little Computer 3"), which was specifically designed for ECE students to be able to implement a basic CPU in hardware. It's significantly cleaner and easier to emulate than any "real-world" architecture, such as x86's absolute mess of instructions. A C compiler is available for it, though without floating-point support (since the LC-3 doesn't have a FPU).

If you want something that's actively used in the real world, try MIPS-I. MIPS is still widely used on embedded systems, and is best-known for being used in the Nintendo 64 and the Playstation. The standard emulator for it is SPIM.

(And of course, as other answers have mentioned, Knuth's MMIX was made famous by The Art of Computer Programming, though unlike the others, to the best of my knowledge, it's never had a true hardware implementation.)

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This is not a completely serious answer but it might suit your case, if you want to keep the instructions to implement for your emulator low.

In fact the x86 mov instruction is turing complete. And there even is a C compiler for it.

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As you found out the simplest is not necessarily the most fun or most useful. If you are doing this for a learning experience, you might want to look into MMIX which is the RISC architecture used by Knuth for "The Art of Computer Programming".

In other words, an architecture explicitly designed for learning documented accordingly, and with some of the most well-thought out example programs for demonstrating computer science concepts so you can actually do more with it afterwards.

https://en.wikipedia.org/wiki/MMIX

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