1
\$\begingroup\$

This MOSFET IRFBG30 is being used in an old design. It even has a little heat sink attached. The FET is used as a current limiter. During normal operation, a current about 13 mA passes through it. Under certain condition, the same FET is going to switch a 1.4A inductive load for a brief moment. What I'm thinking is to redesign this board and replace that FET, with this one: IPD95R1K2P7 which is a surface mount FET. I would use the PCB as heat sink. I note that the new FET has VDS: 950V and the old one 1000V. But I think this shouldn't be an issue, as I expect the max VDS to reach 900V under some critical/unwanted condition. Of course, this time the IRFBG30 wins. However, the IPD95R1K2P7 has lower RDS.

Is this a good idea?

EDIT: Added the circuit

enter image description here

\$\endgroup\$
4
  • \$\begingroup\$ How long is “brief moment”? \$\endgroup\$
    – winny
    Jul 22, 2019 at 19:32
  • \$\begingroup\$ Not sure, but it's short. Probably less than a second as the coil when turned on will remove the main supply. \$\endgroup\$
    – user115094
    Jul 22, 2019 at 19:34
  • 2
    \$\begingroup\$ Show the circuit, if there is any inductance in the circuit 900V could quickly turn to 1000V with inductive overshoot. \$\endgroup\$
    – Voltage Spike
    Jul 22, 2019 at 19:34
  • \$\begingroup\$ It will be a dimensioning parameter so you need to define it. \$\endgroup\$
    – winny
    Jul 22, 2019 at 20:02

2 Answers 2

1
\$\begingroup\$

This is the Safe Operating Area (SOA) of IRFBG30 you were using:

enter image description here

..and finally IPD95R1K2P7:

enter image description here

Now compare the "10ms or DC" portion of the SOA curve, highlighted in yellow on the last one. The first FET has a constant power SOA limit, that is Vds*Id is constant, which in a log-log graph manifests as a straight line with a downward slope of "10x more volts, 10x less amps."

However, the second FET has double the slope, and since the graph is log this means "10x more volts, 100x less amps."

This indicates the first FET should be fine for linear operation, but the second FET probably has some localized self heating / hotspot / current hogging phenomena that makes it a lot less robust in linear operation. It's most likely optimized for switching only, at the expense of linear.

Also at 13mA DC, the voltage you intend to use violates the SOA by a quite substantial margin so it will probably pop.

\$\endgroup\$
0
\$\begingroup\$

Be careful .For high reliability 1200 Volt semiconductors should be used ,so consider a 1200V mosfet or a series string .Remember that modern Powermosfets are not good in the linear mode .Lower RDs on types tend to be worse due to current crowding .Consider a series resister in the drain circuit to reduce device stress.I use a discrete buck converter on such 3 phase applications .

\$\endgroup\$
1
  • \$\begingroup\$ Ok. However, I don't think there are 1200V FETs available at Surface Mount, so in this case I would stick to Through Hole package. \$\endgroup\$
    – user115094
    Jul 22, 2019 at 20:58

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.