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In the datasheed for the ACS71020 IC, it shows the typical application of the device in which current is passed through the chip and voltage is measured on the opposite side.

I do not understand how the voltage measurement pins can be placed on the same side of the IC as the low voltage connections. Doesn't this ruin the mains isolation from the low voltage side?

https://media.digikey.com/pdf/Data%20Sheets/Allegro%20PDFs/ACS71020.pdf

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The multiple 1 MΩ resistors are part of the isolation barrier between the mains and the low-voltage side of the chip. Clearance and creepage are not an issue at the pins, because the chip itself prevents the voltages on those pins from getting too far from ground potential.

The suggested layout doesn't show the resistors, but I assume that they would have to be through-hole devices so that the circuit meets clearance and creepage requirements between the two sides.

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  • \$\begingroup\$ when simulating the circuit with circuitlab I get a (<250mV) low voltage between VINP and VINN, but still a (>100V) high voltage in reference to in reference to any of the AC pins. Could you clarify on how the chip is maintaining the voltage at those pins low in reference to ground? I see no reference of that in the datasheet. \$\endgroup\$
    – nschurando
    Commented Sep 14, 2021 at 15:40
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    \$\begingroup\$ @nschurando: I don't understand your question. The chip keeps VINP and VINN close to ground potential, where ground is the voltage on pin 14. Nobody ever implied that there wouldn't be large voltages between pins 14/15/16 and the AC line. You're right, the datasheet does not explicitly discuss this, but the specification for common-mode input voltage strongly suggests that there's an internal bias circuit at around 2/3 Vcc. \$\endgroup\$
    – Dave Tweed
    Commented Sep 15, 2021 at 4:05

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