I'm working at a project. Pcb of this project has four layers. And I'm wondering about polygon strategies. Me and my team decided to split polygons. For example at top layer, half side of top layer is power and other half side is gnd polygon. Second and third layers is same top layer. Bottom layer is completely gnd polygon. This methods is true? Or is there a disadvantage this approach? Note : Second and third layer is signal layers.
You don't divide up PCBs like this. What you call a polygon is formally called a "copper fill" or "copper pour". This just fills in the empty space between traces on the signal layers. That's all it does.
It's there so that PCBs etch faster and less etchant is required, producing less waste. It also keeps copper distribution on both sides equal so the board does not warp. If left floating, these can re-radiate EMI and cause noise issues so you connect these to a known potential (usually ground).
It is not used as an easy access point for the components to access voltage or ground from anywhere. This is because it is possible for a bunch of traces to isolate sections of copper and leave them unconnected, or have traces cut straight across the polygon and divide it into two. Even if the traces don't chop up the polygon, the it requires power or ground currents to take a very long path around the traces which increases inductance which increases noise). If you need a potential that can be accessed from anywhere, you use a plane.
What you actually do is divide PCBs up into planes (either power or ground) and signal layers. The copper fill/pour you add to fill in the empty space around those signal traces should connect to ground.
Then you divide up areas on the the signal layers into sections such as analog and digital. The whole point of these is so that sensitive sections do not have ground currents from other section flowing through their area of the ground plane. Therefore, the divisions are usually the same on all signal layers.