# Converting Open-Drain to Active-High (low voltage, low power)

In my design, I need an RTC (PCF85263A) to enable a boost converter (TPS61021A) after the RTC alarm triggers an interrupt. The interrupt pin on the RTC (INTA) is open-drain, but the enable pin on the boost converter (EN) is active-high. This is a problem.

When the alarm triggers the interrupt on the RTC, the INTA line is held at 0V, and when the interrupt isn't active, INTA is high-impedance. However, I need it the other way around: the EN pin needs to be held up to battery voltage when the alarm interrupt is active.

My first guess is to use an N-channel MOSFET logic inverter to achieve this. The input, of course, would have a pull-up resistor to VCC.

simulate this circuit – Schematic created using CircuitLab

However, the battery voltage VCC can go as low as 0.9V in this design. Another important requirement is that the power consumption be as low as possible while the RTC is "sleeping" - before the alarm triggers an interrupt. The RTC uses 300nA and the boost converter has a shutdown current of 500nA, so my power budget can take about 1-2μA more during sleep.

As such, I am not sure if this MOSFET inverter will be the most power-friendly option. Additionally, a MOSFET might not be the right choice for such low voltage - I assume that I must browse for VGS/VCE/VSAT choices at or below 0.9V.

What would be a power-friendly transistor choice to convert an open-drain, active-low output signal into an active-high signal for an input pin?

My design originally used the TPL5111 power gating timer instead of an RTC. It has a proper push-pull, active-high enable pin to wake the boost converter. Unfortunately, it can only "go to sleep" for up to 2 hours at a time. I thus want to migrate to an RTC so that my device can sleep for days or months instead; having the device wake up is a power-costly operation.

Edit: This PNP solution forgoes a pull-up at INTA. Credit to Tim Wescott.

simulate this circuit

The circuit simulator isn't working for me today (grr).

PNP. Emitter to +V, base to RTC through a resistor (100k$$\\Omega\$$?). Collector to boost converter, with resistor to ground (same as base resistor). Size the resistor for a happy medium between turning on & off reliably, and not consuming too much current. It should consume very little current when off.

• I have edited my question to include a schematic of your solution idea. Is that the design you intend? Additionally, when you say it "should consume very little current when off", is any stray current consumption because of leakage from emitter to collector? I want to know which component parameters to optimize besides \$.
– Phil
Jul 23, 2019 at 22:21
• Yes, it's the transistor leakage from emitter to collector. It should be teeny, but you'll want to check. Jul 23, 2019 at 22:43
• @Phil Sure there is leakage. But my understanding is that BJTs have less leakage than MOSFETs do. It's not like the MOSFET circuits didn't have leakage. Jul 23, 2019 at 22:43
• @TimWescott In that regard, I will leave the new schematic at the bottom of the post as reference for others. Good stuff.
– Phil
Jul 24, 2019 at 0:25
• I'm going to do something very similar to this but I want to make sure. The pull up is required on INTA for it to work properly, correct? Sep 30, 2019 at 22:44