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Altium (19.0.10) says the following nets contain floating input pins:

CLR
DIN
LATCH
SCLK

But they seem connected (and on grid) to me (see below). Earlier they were directly connected, no luck. I created an empty project, added this schematic and compiled and got the same errors (and a few bonus errors). Also, I don't want to suppress these errors; I want to fix them.

altium schematic

Even if I connect the schematic to its parent schematic (see below), I get the same errors.

parent schematic

Also, I'm getting "Net [] has only one pin..." errors/warnings for these pins (and many others) in my top level schematic. I've checked and everything is on grid (and I think I have my buses/taps named correctly --e.g. SDO1, SDO2... SDO12 go to SDO[12..1]).

Again, I don't want to place directives to silence the errors. Any other comments are welcome (I'm an Altium newb).

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  • \$\begingroup\$ are the ports connected to anything else in the schematic ? \$\endgroup\$
    – efox29
    Jul 28 '19 at 1:34
  • \$\begingroup\$ No. The nets in question are confined to the image I uploaded (I checked with Alt-LMB) \$\endgroup\$
    – Ralph
    Jul 28 '19 at 1:38
  • \$\begingroup\$ thats probably the problem - not in front of Altium right now to try. Try connecting something (other than a port, an off-sheet connector, or a wire) to it to see if it goes away. \$\endgroup\$
    – efox29
    Jul 28 '19 at 1:40
  • \$\begingroup\$ altium.com/documentation/18.0/display/ADES/… \$\endgroup\$
    – efox29
    Jul 28 '19 at 1:42
  • \$\begingroup\$ Building on efox29's comment, Altium takes issue sometimes with unconnected ports or ports that cross several levels of sheets (i.e. sheet within a sheet within a sheet), try connecting the other end of the port to something and see if you still have the same issue. You can set net names to be local or global but Altium wants to see something on the other end of the wire, otherwise Place->Directives->Generic No ERC can be used to suppress the error if you do not intend to connect the nets but would like them named. \$\endgroup\$
    – Sam
    Jul 28 '19 at 1:43
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My first guess would be that this has to do with the REPEAT statement. Have you tried reversing the indices?

Anyways, after also having lots of troubles (especially there not being a 0 index) I have stayed away from the REPEAT statement. Instead, I decided to simply place multiple instances of the sheet symbol (not copies of the sheet). This also allows more fine-grained control over which net goes into which instance instead of relying on indices. I highly recommend this approach even if it means you'll need a little more space in the schematic.

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