# Inrush control circuit

I am analysing the an eval board circuit for a battery charger IC which has the following inrush control circuit.

Question 1: I understand that C22 is used to "slow start" Q6 limit inrush current into C3,C4,C23,C24,C44. Signal CHG_OK goes high, when a power source is detected at J1 (12V). With CHG_OK high, Q10, Q9B and Q9A are turned on. I don't understand resistor R10 because if Q9A is on, ~12V are applied on Q6 gate, which will keep Q6 closed. How does this inrush control circuit work?

Question 2 Why are there several capacitors (C3,C4,C23,C24,C44) and why can't they be replaced with just one large capacitor?

• The multiple capacitors are probably decoupling multiple chips, or multiple power pins on one chip, and will be placed close to those power pins. – Hearth Jul 28 '19 at 14:46

2: low ESR caps of 10uF have an inherent $$\\tau=\$$ESR*C<=10us constant in any given family at some Vdc rating and size.