I'm testing out different circuit simulator programs and I was able to build the integrated circuit SN74LS245 Octal Bus Transceiver in a program called Digital Works. Here is the datasheet SN74LS245 pdf.

In Digital Works you set up the logic gates that you need, and for the pin I/O in this application it has a tag device in which you can associate that tag as an external pin to the IC. In Digital Works, I'm able to save this circuit and its template as a macro and then be able to include that into another circuit.

Within Digital Works I was able to create an 8 bit bus and connect multiple devices to it using this 74LS245 chip. I can use the ~OE pin which is active low to allow the chip to be either active or inactive to the bus. I can then use the DIR pin to set the direction of the I/O. If DIR is set HIGH or 1 then logic will flow from pins [A1..A8] to pins [B1..B8]. If DIR is set to LOW or 0 then direction flows from [B1..B8] to [A1..A8]. This is the desired and expected behavior of this chip.

I will show some screen shots of the logic implementation and the different simulated states it can be in.

Here is the logic diagram within Digital Works when all of the pins or external connections are defaulted to 0 or LOW input. This is the internal design of the IC macro circuit.

74LS245 Logic

Now I'll show you a series of images in it's different states: I'll only be using 4 pin I/O's for this demonstration. I will have A's bus inputs as 0011 and I'll have B's inputs as 1100 just to show how it only flows in a single direction or doesn't flow at all or disconnects when ~OE is set to HIGH. First here is the truth table of the 4 states:

~OE  | DIR | BUS A - in | BUS B - in | BUS A - out | BUS B - out
 0   |  0  |    0011    |    1100    |    1100     |    1100
 0   |  1  |    0011    |    1100    |    0011     |    0011
 1   |  0  |    0011    |    1100    |    0011     |    1100
 1   |  1  |    0011    |    1100    |    0011     |    1100

Here are the 4 images of the respective states:

State A

State B
State C
State D

I tried to do the same thing in Logisim but I'm having issues with it's pins for I/O. It seems that Logism is expecting for it to be either an input or an output. However, there is an option to set it to 3 states, but I'm not getting the desired behavior that I am seeing within Digital Works. Can this type of circuit with bi-directional capabilities be simulated within Logisim? If so; how would one do this, what am I missing or over looking?


Your test circuit looks as though it's driving the pins on both sides of the simulated IC. This won't work -- you need to disconnect the drivers (square with circle inside) on the side that's currently being used as an output.

Digital Works appears to be handling this situation incorrectly by allowing the output of the IC to override the output of another driver with no warning. Logisim will (correctly) warn you when this occurs -- a simplified version of your test circuit yields:

enter image description here

  • \$\begingroup\$ It has tri state logic within the circuit. If the OE pin is set low the chip is enabled and the direction of the flow will depend on what the DIR pin is set to high or low. If you look at the images that are from Digital Works; you will see that the lines that are black are active high and the lines that are grey are either active low or disabled... \$\endgroup\$ – Francis Cugler Jul 30 at 23:26
  • \$\begingroup\$ No, I mean in the circuit outside the IC. Every indicator (circle thing - LED?) is connected to a driver, which is actively driving the signal high/low regardless of whether the IC is also trying to drive that signal or not. \$\endgroup\$ – duskwuff Jul 30 at 23:28
  • \$\begingroup\$ In the first image the led's on the left that are lit up are coming from the b-side bus, and the pressed buttons on the left are still on but the led's are off when the DIR is low, in the 2nd image when DIR is high, it's just the opposite. \$\endgroup\$ – Francis Cugler Jul 30 at 23:29
  • \$\begingroup\$ This works fine in Digital Works because of the tri state buffers within the IC, follow the logic! If Enable is low then the and gate on the right side is active and it is sending a 1 to the left side and gate. This activates the line going all the way down on the right side that is connected to the tri state buffers' enable line. When DIR is low, it will drive the flow from B to A. When DIR becomes HIGH or 1, It turns on the left line all the way down, and turns off the right line all the way down making flow go from A to B. \$\endgroup\$ – Francis Cugler Jul 30 at 23:35
  • \$\begingroup\$ The images above are showing that the simulated circuit works within the application Digital Works. The buttons that are connected to the LEDs are what is driving the values across the wires. \$\endgroup\$ – Francis Cugler Jul 30 at 23:37

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