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I need technology in which the IC will work at temperatures above 300 °C. For example, Fraunhofer makes chips at this temperature using Tungsten interconnect. Do foundries like TSMC or Globalfoundries have similar technology for fabricating high-temperature chips?

I'm looking for a chip like this. Can it be made with conventional foundries such as TSMC or GF ...? High temperature SOI CMOS technology and circuit realization for applications up to 300°C

I need technology like this: High Temperature Electronics

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    \$\begingroup\$ Why must the IC work at temperatures above 300 C? Why can't you place the IC somewhere else or shield it from heat? \$\endgroup\$ – Harry Svensson Jul 31 at 7:11
  • \$\begingroup\$ IC is located next to a strong source of heat and cannot be shielded. \$\endgroup\$ – seyyedali hosseini Jul 31 at 7:13
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    \$\begingroup\$ Consider fluidics, that works well at high temperature \$\endgroup\$ – Neil_UK Jul 31 at 7:14
  • \$\begingroup\$ Do foundries like TSMC or Globalfoundries have similar technology for fabricating high-temperature chips? I would say that they don't but I could be wrong. This high temperature stuff looks to me like it is still in the research phase (Fraunhofer is a research institute not a commercial foundry like TSMC and GF). \$\endgroup\$ – Bimpelrekkie Jul 31 at 7:31
  • \$\begingroup\$ or wait till carbon nanotube IC's come out. Arhennius Law prevails. 200'C works for a short time.. get a chiller. read ... IEEE TRANSACTIONS ON COMPONENTS, HYBRIDS, AND MANUFACTURING TECHNOLOGY, VOL. 16, NO. 7, NOVEMBER 1993 159 2OO'C for 72 hrs Operation of Semiconductor Power Devices R. Wayne Johnson, Member, ZEEE, James R. Bromstead, and G. Bennett Weir \$\endgroup\$ – Tony Stewart Sunnyskyguy EE75 Jul 31 at 7:41
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How long must the ICs function at the high temperature? Is this just LOGIC? or some forms of tunneling-charge-storage memory? or some precision analog?

aluminum is placed/sputtered? on the wafer at ??400C.

You might simply ask for device models characterized at 300C or 325C, and implement the functions needed.

I suggest you implement thermal-flow models, to minimize local heating; use lots of metallization to MOVE THE HEAT; strap the metal to active/hot regions with LOTS OF CONTACTS to the active.

In other words, YOU DESIGN THE HEAT FLOWS to avoid that extra 100C temperature rise. What functions do you need? What speed? what precision or matching?

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  • \$\begingroup\$ I'm looking for a chip like this. Can it be made with conventional foundries such as TSMC or GF ...? High temperature SOI CMOS technology and circuit realization for applications up to 300°C ieeexplore.ieee.org/abstract/document/7168845 \$\endgroup\$ – seyyedali hosseini Jul 31 at 9:33
  • \$\begingroup\$ As I explained, IF you design the heat flows, you can lower the onchip temperature 50C or 100C. What functions do you need? \$\endgroup\$ – analogsystemsrf Jul 31 at 9:58
  • \$\begingroup\$ The electronic part is a simple ADC. Does this temperature damage the Interconnect layers? \$\endgroup\$ – seyyedali hosseini Jul 31 at 12:05
  • \$\begingroup\$ How many bitsmust? are switched-capacitors used in the conversion process, where high-temperature leakages matter? How many hours must the ADC continue to function? What temperature spikes will occur past 300C? How fast? A tracking-ADC, using a remote DAC in a cool region, can be quite accurate; all you have in the hot-region is a comparator and binary-logic UP-DOWN counter. Again, design the physical layout to avoid hot spots. Minimize the CMOS shot-thru currents in logic and in analog circuits. \$\endgroup\$ – analogsystemsrf Jul 31 at 14:59

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