How to resolve VHDL packages constant name clash?

There are 3rd party packages where there is clash because

1. There are constants with same name in both.
2. Procedures with same name in both.

How to prevent this clash and make sure that the project will compile and simulate and I can access specific constant or procedure in my testbench without trouble?

• As well as being directly visible named entities can be be referenced by selection with expanded names. IEEE Std 1076-2008 8.3 Selected names. Also see 12.5 The context of overload resolution.
– user8352
Aug 1, 2019 at 11:47

You should be able to access items in each package separately by only useing the package, not its entire contents, then specifying which package to reference a constant or procedure in each time one is used. See example:

package p1 is
constant C : integer := 1;
end package;
package body p1 is
end;

package p2 is
constant C : integer := 2;
end package;
package body p2 is
end;

use work.p1;  -- Without .all
use work.p2;

entity e is
end;
architecture b of e is
-- This constant can even have the same name as the one in the package
constant C : integer := p1.C;
constant C2 : integer := p2.C;
begin
end b;