I am trying to simulate a LNA circuit from the book "Design of CMOS RF Integrated Circuits and Systems"
However, the LNA circuit still does not give POSITIVE GAIN.
Any help ?
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Vgate of M1 is at VDD, that, together with the voltage drop across M2 forces it into linear mode. You want to use M1 in saturation mode. I would use something like this to have better control over the DC biasing current through M1:
Note how M1bias and M1 form a current mirror, this allows me to directly set the DC biasing current through M1 by setting the value of I1.
R1 is a high impedance for the RF signal so M1bias doesn't see the RF signal. All RF signal goes to M1, which is what we need.
I biased the gate of the cascode transistor Mcasc with a separate DC voltage source. That way I can easily play with the value (in your circuit it is always VDD which is less flexible).
Note how I use C1 and C2 (both 1 nF) to block the DC signals. This works two ways, the LNA circuit isn't disturbed by any DC voltages at the input source or the output. The inputs and outputs will have a DC voltage of 0 V.
Small point: Ca does nothing in your circuit, it is directly in parallel with the the 1.8 V DC power supply which is an ideal voltage source so Ca will have 1.8 V DC across it as that is forced by the DC source. If you want to model the effect of a supply with an internal resistance then add resistor in series with the 1.8 V DC source and the Ca will help as it will decouple the VDD line to GND.