This is the structure of FAN3100 gate driver IC:

enter image description here (taken from its datasheet)

As you can see - there are two ouput switches: CMOS and BJT.

Why they put them both?

  • \$\begingroup\$ Another question that arises is why the bottom NPN is NPN and not PNP \$\endgroup\$ Aug 2, 2019 at 13:36
  • \$\begingroup\$ Notice the differential inputs. That makes this driver more immune to Ground upsets. \$\endgroup\$ Aug 2, 2019 at 15:12

3 Answers 3


Paragraph 2 of the description says:

FAN3100 drivers incorporate MillerDriveTM architecture for the final output stage. This bipolar-MOSFET combination provides high peak current during the Miller plateau stage of the MOSFET turn-on / turn-off process to minimize switching loss, while providing rail-to-rail voltage swing and reverse current capability.

At the bottom of page 14 in the section *MillerDrive Gate Drive Technology" it goes on to explain:

The purpose of the MillerDrive architecture is to speed up switching by providing the highest current during the Miller plateau region when the gate-drain capacitance of the MOSFET is being charged or dischared as part of the turn-on / turn-off precess. For applications that have zero voltage switching during the MOSFET turn-on or turn-off interval the driver supplies high peak current for fast switching even though the Miller plateau is not present. This situation often occurs in synchronous rectifier applications ecause the body diode is generally conducting before the MOSFET is switched on.

The answer to "Who can tell me about Miller Plateau?" explains it thus:

When you look at the datasheet for a MOSFET, in the gate charge characteristic you will see a flat, horizontal portion. That is the so-called Miller plateau. When the device switches, the gate voltage is actually clamped to the plateau voltage and stays there until sufficient charge has been added/ removed for the device to switch. It is useful in estimating the driving requirements, because it tells you the voltage of the plateau and the required charge to switch the device. Thus, you can calculate the actual gate drive resistor, for a given switching time.

The BJTs are able to get the output moving while the MOSFETs are ramping up. The MOSFETS can then provide the rail to rail voltage swing.

  • \$\begingroup\$ Interesting topology, but I don't understand a thing: how can the lower NMOS turn on, since its Vgs is clamped to ~0,7V by the lower NPN BJT? It will work if the lower mosfet has a very low Vgs(th), but can they make a, say, ~100mV threshold NMOS? I understand that is a simplified schematic, so something could have been left out in that respect, however why not put a buffer symbol before the NPN base if it's there, after all in the positive rail driver there is an inverting buffer before the upper NPN. Not drawing one when there is one seems a silly simplification. \$\endgroup\$ Aug 4, 2019 at 15:57
  • \$\begingroup\$ I haven't a clue. I found the question interesting, didn't have a definite answer, did a little research and, to my surprise, had my answer accepted and upvoted. As you say, the block diagram is probably a simplification, the NPN may not be a very good one and there could be some resistance or current limit in its base. \$\endgroup\$
    – Transistor
    Aug 4, 2019 at 16:01
  • \$\begingroup\$ Problem solved, thanks! I delved into the datasheet and indeed further down there is a figure (figure 42) that shows the details of the MillerDrive architecture. It shows that both the upper and the lower BJTs have their own driving circuitry, comprised of a couple of MOSFETs. \$\endgroup\$ Aug 4, 2019 at 21:39
  • \$\begingroup\$ @Lorenzo, thanks for the feedback. I had scanned the datasheet while researching the answer but missed the significance of that diagram. \$\endgroup\$
    – Transistor
    Aug 4, 2019 at 21:41
  • 1
    \$\begingroup\$ You're welcome! I still find utterly silly the "simplified diagram". It is not "simplified", it's wrong! If they didn't want to show just that 4 additional MOSFETs for fear of overcomplicate things, it would have sufficed to place a box before the bases of the BJTs with "driver" written on it. Meh! \$\endgroup\$ Aug 4, 2019 at 21:46

The CMOS and BJT output stages are combined to from one stage, the manufacturer calls this a "MillerDrive(tm)".

Why they do this is explained in the datasheet:

enter image description here

My guess is that they want to achieve a certain (output drive) performance that cannot be achieved by only using CMOS transistors or only using the NPNs with the manufacturing process that they're using for this chip.

The CMOS part helps pulling the output to GND and VDD, the NPNs cannot do that so well as there will always be a \$V_{CE,sat}\$ at the GND side and a \$V_{BE}\$ at the VDD side.

The NPNs are very likely able to deliver more current and will switch faster. This might be a consequence of the manufacturing process they're using as it is possible that in a different process the MOSFETs are so much better that similar performance could be achieved using CMOS only. Such a process might be more expensive though.


Notice how the top NPN can only make the output reach VDD-0.7 V, I assume it is the job of the mosfet to take care of the last 0.7 V.

It looks as if the BJT's are doing most of the grunt work and the mosfets are taking care of making the output reach VDD and a strong GND.

I could be wrong though.


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