I can't figure out why exactly the no. of comparators is (2^n)-1 in a parallel type ADC.
The truth table (shown below) for a three bit priority encoder say that there must be at least one HIGH input for the valid output. But as I was reading the Digital Fundamentals by Thomas L. Floyd, the figure shows that the pin 0 of the priority encoder is grounded(it's a reference point and can be any level of volts but I am taking it to be zero as a common practice). So when every output of comparator is 0, all the inputs of the priority encoder are 0.
Is this input valid? Or is it me that is taking the ground to be 0V, rather than some +ve volts to keep this pin high every time?
Here is a screenshot of the circuit shown in the book I am going through.