# Latching power switch question

I have the following circuit (source: EDN):

I understand the basic working principle of the circuit and it works fine when it is powered from a 1.5V source. But when I power the circuit from a 9V source, by default it get's turned on instead of turning on only when the S1 switch is pushed.

So my question is:

• what causes the circuit to get turned on by default, when the 9V is applied to it? Is it the leakage current of the transistors? Or is it something else?

I noticed that this behavior occurs only if C1 is discharged when the 9V is applied.

This is one of those circuits that reminds me how clever some people can get with a handful of inexpensive bipolar transistors that can create a a boat-load of weird effects due to all the variables of transistor gain and parasitic effects, including the Miller capacitance of a few pF dominant on Vbc of the SCR pair.

I am going out on a limb here and going to suggest if you slowed the step input of 9V with a typical supply decoupling cap. or try any cap ~100pF across base-emitter of Q1,2 and/or Q3 (such as your finger tip), it may work but there are more reliable latch switch designs that actually toggle with each momentary operation and have a reliable power-on reset.

But why does it fail? Now in your mind add 5pF of Miller capacitance on the schematic of every Vbc junction for the initial condition of V+=0V everywhere. Now do you see the transient current flowing thru Q1 c-b junction into the base of Q3. There is a chain reaction of a dozen pico-amps of charge current here getting amplified by Q3 into 1 microamp more than enough enough to bias R7 for 0.6V drop to fire Q2 into latching Q3.

Bam. You have an SCR latch.

Even noise could make this circuit false trigger depending condition of 9V battery and load and dozen other variables.

You have have heard that SCR's are prone to dv/dt noise and use snubbers to prevent false triggering by having a V+ capacitor on the rail and some series resistance to get less than < 1V/uS. Even good SCRs with sensitive gates also tend to be prone to "dv/dt supply noise" and false triggering unless very carefully designed.

Now how did you apply the 9V?

if you want a good CMOS toggle switch, just answer another question.

• you could make this circuit work with the wave of a hand e-field with a very small modification. but then your cat may trigger it as well. Oct 21 '12 at 19:35
• May be off-topic. What exactly is a leakage current of a BJT and from where and to where it flows? Oct 21 '12 at 20:24
• It is relevant here. Consider the offstate as a passive capacitor coupling of a step voltage. Varicap diode model when Vcb =5V Ccb=4pF while Ie=o. Diode Capacitance always reduces sharply as reverse bias is increased. It is higher at 0V. Leakage tends to be constant current in 50 nA range with bias voltage, but 0nA initially means 470K series R to Vbe of Q3 has no load so Q3 Vbe rises quickly to 0.5V then leakage of 50nA is constant. When C1 (1uF) is charged up it with power-on toggle in Load-Off-state, there is less Ccb coupling Q1 to Q3 so it doesn't false trigger. Oct 21 '12 at 23:57
• @Richman I breadboarded the circuit and I applied the power using a mechanical switch. Oct 22 '12 at 9:51
• Good answer... but +1 for observing the "cleverness" of some people! Proof that just because you can, doesn't mean you should. Oct 22 '12 at 9:55

If you use the circuit as published the original author says that this is optimized for operation with the VS from 1 to 1.5 volts. The design idea has some good pointers on adjusting the values of R1 and R2 to optimize for other supply voltages. Do note that with this circuit the R1 value needs to be adjusted so as to not put an unacceptable amount of load on the battery.

I would like to suggest that the circuit behavior is really designed to deal best with a supply voltage that remains connected. If it happens to come on during the time you are putting in a new battery then so be it and just turn it off.

I have tried it too, it's due to Q4 connected to Q3, instead connect the emitter of Q3 to the base of Q4. Download the Falstad Java simulator and import this, it will make a simulated circuit showing how it works.

\$ 1 5.0E-6 78.57719942274176 85 5.0 50
R 368 128 368 80 0 0 40.0 9.0 0.0 0.0 0.5
r 368 128 368 208 0 1000000.0
w 368 128 272 128 0
r 32 128 32 208 0 470000.0
r 32 208 32 304 0 47000.0
t 192 224 112 224 0 1 -3.014670367677633 9.600028328641406E-8 100.0
t 336 304 368 304 0 1 -8.99999974594971 -0.11562422628182925 100.0
r 368 208 368 288 0 100000.0
t 320 208 272 208 0 -1 8.999999754499703 -1.500000141874125E-7 100.0
w 368 208 320 208 2
w 272 192 272 128 0
w 272 128 32 128 0
w 32 208 112 208 0
r 192 224 272 224 0 10000.0
w 368 400 272 400 0
r 272 224 272 304 0 10000.0
r 272 304 272 400 0 470000.0
r 304 304 272 304 0 1000.0
w 272 304 208 304 0
w 32 304 160 304 0
s 160 304 208 304 0 1 true
w 112 400 272 400 0
w 112 240 112 400 0
w 112 400 32 400 0
g 368 400 368 448 0
t 416 288 448 288 0 1 -8.884375675627894 0.11562432033210668 100.0
w 368 128 496 128 0
w 496 128 496 224 0
w 448 224 448 272 0
w 448 304 448 400 0
w 368 400 448 400 0
178 528 224 528 304 0 1 0.2 1.0099998609769703E-11 0.05 1000000.0 0.02 400.0
w 480 224 448 224 0
c 32 304 32 400 0 1.0000000000000002E-6 2.416137514745726
w 416 288 368 320 0
w 336 304 304 304 2
o 29 64 0 35 7.62939453125E-5 9.765625E-5 0 -1