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I am designing a print which has some mircofit connectors, I have placed TVS very close to the connectors on the print and the ground pad connected with a GND polygon directly, this polyon connects with a ground layer by GND vias.

My question is, since the ground pad of the TVS diode connects to the a copper plane directly, do I need to use thermal relief connection between the GND pad and the copper plane like below? enter image description here

I knew that TVS diode is used to shunt the ESD current, so i am expecting when ESD happen, there is a huge current goes through the TVS diode for a very short time, according to IEC 61000-4-2, almost 30A current in 800ps (90/10 rise time), if a thermal relief is needed, how do I use these information to calculate the trace width and air gap for the thermal relief connection?

My last question is if the other pad of the TVS diode, which connects with the ESD source can be soldered easily(also shown in the pciture), do I still need to care about the GND pad?

Thank you very much!

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You don't need to but it makes soldering easier.

Inductance is what matters more for ESD than resistance so the dimensions aren't too big a concern.

My last question is if the other pad of the TVS diode, which connects with the ESD source can be soldered easily(also shown in the pciture), do I still need to care about the GND pad?

Huh?

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  • \$\begingroup\$ I appreciate your help :) How about the trace width for the relief connection? sorry my last question is not clear, what I mean is that there are 2 pads on TVS, one to the ESD source(the connector), one to ground. The one to ESD source doesn't have direct connection with any copper pour, so should it be easy to solder this pad ? once this pad is solder, i'm thinking the ground pad will be easy to solder too,since the TVS is already stable on the board? or this is not how it works at all? I hope this sounds a bit clearer, Thanks again for your answer! \$\endgroup\$ – Sunss Six Aug 9 at 7:32
  • \$\begingroup\$ Trace width for the relief doesn't matter most of the time. The pad with no pour will be easier to solder. But it being soldered first does not always make the pad on a pour easier to solder if there is no thermal relief. The pad on a pour might take so much heating that the solder on the other pad melts first and the component becomes loose again. \$\endgroup\$ – DKNguyen Aug 9 at 13:43
  • \$\begingroup\$ Ok this is clear for me! Thanks! But I still don't understand why the trace width for thermal relief doesn't matter? if there is a high current, before they enter the pour they would still have to go through these trace first right? If the width is not wide enough how do they withstand the high current from ESD event? \$\endgroup\$ – Sunss Six Aug 9 at 15:02
  • \$\begingroup\$ @SunssSix As I said, inductance matters more for ESD than resistance. The ESD event is very high frequency and passes through the capacitances and inductance is the limiting factor, not resistance. \$\endgroup\$ – DKNguyen Aug 9 at 15:16
  • \$\begingroup\$ ok! Thanks a lot! \$\endgroup\$ – Sunss Six Aug 20 at 7:08

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