Suppose I have a 2 layer PCB with the following characteristics:
- Top layer is relatively densely populated by both THT ad SMD components
- Bottom layer has very few traces
Among the following, what is the best option from a theoretical EMI & EMC point of view and why?
- Top ground plane (copper pour)
- Bottom ground plane (copper pour)
- Both top and bottom ground planes with connecting vias
If you think another option not listed might be better please do propose it and explain why.
This is a theoretical question so I don't have a concrete example to show. Feel free to report some practical examples.
My guess is that option 2 would be the best since it allows for the current to choose the path of least resistance and avoid large loops, although maybe depending on the layout option 3 might also be reasonable.