In a 2 layer PCB with a top layer densely populated, from an EMI & EMC point of view should the ground plane be on top, bottom or both and why?

Question

Suppose I have a 2 layer PCB with the following characteristics:

• Top layer is relatively densely populated by both THT ad SMD components
• Bottom layer has very few traces

Among the following, what is the best option from a theoretical EMI & EMC point of view and why?

1. Top ground plane (copper pour)
2. Bottom ground plane (copper pour)
3. Both top and bottom ground planes with connecting vias

If you think another option not listed might be better please do propose it and explain why.

This is a theoretical question so I don't have a concrete example to show. Feel free to report some practical examples.

My guess is that option 2 would be the best since it allows for the current to choose the path of least resistance and avoid large loops, although maybe depending on the layout option 3 might also be reasonable.

Answer 1

You want as solid ground plane as possible, so you should have the ground on bottom and preferably have no other traces there.

For better copper balance you should also have the copper pours on the top layer to fill the empty spaces. If there isn't any better use for it, connecting the pours to the bottom ground plane with vias is a good choice. Though this has little to no effect on EMC performance.

So from your options the number 3 is the best, but if you are considering only EMC performance the option 2 is practically equally good.

Though, with these questions about 2 layer boards, I always like to remind that nowadays 4 layer boards are cheap, and using 2 layers is recommended only if you have to save every last penny, i.e. you have huge volumes. Otherwise the higher design cost of two layers will outnumber the higher production cost of 4 layers

Answer 2

A copper pour amongst a bunch of component traces is NOT the same as a ground plane. This is because the whole point of a ground plane is to provide currents the shortest, lowest inductance (smallest loop) possible path. This does not happen in a copper pour riddled with component pads and traces since the ground/return currents must take the long route around all the interruptions.

It's just a copper pour so less etchant is required and enure more symmetrical copper balance on both sides of the board (to prevent warping) that has been connected to a fixed potential so that it doesn't float and cause EMI issues.

With this in mind:

Option 1 is not a ground plane at all.

Option 2 is a ground plane.

Option 3 is not two ground plane connected by vias. It's one copper pour on top which has been connected to a ground plane on the bottom via copper pour.