n Gate to source capacitor in gate drive?

Question

I'm designing a gate drive and I saw in a reference design this circuit, what would be the explanation for placing a capacitor between gate-source of the MOSFET (or IGBT)? I've read that a resistor is also placed likewise to prevent sudden turn ons? *Also though it says it's not mounted, I'm thinking there was a reason for placing it.

I did some test with:

1. No capacitor
2. 1nF capacitor
3. 10nF capacitor

I added an idea of the schematic of what I'm testing, I'm using SiC MOSFETS, the power stage are two boost converters with common ground.

The driver ground is connected to the power ground of course.

This is what I found:

^{simulate this circuit – Schematic created using CircuitLab}

]4

I think it is highly related to the comments of Marcus Müller and the answer of JonRB.

Further explanation of this is appreciated.

Thanks

Answer 1

This is sometimes added if a specific instance is susceptible to dv/dt turn-on (layout, lower current drive, installation). A collector-gate current, via the parasitic capacitance: Ccg flows at every switching event. If the gatedrive does not have enough drive capability to absorb this charge then the IGBT can inadvertently turn on.

By adding a capacitor in parallel with the devices Cge, this capacitor will aid in absorbing the charge at the expense of increasing the gatedrive power need

Answer 2

C6 is unusual and would usually be detrimental.
R1 is on the high side and especially so if C6 is installed.
Gate time constant = Trc_= R1 x Cg should be small wrt switching times but not very small.

Related:

Move D5 to immediately physically adjacent to Q1/Q1A - as close to the GS leads as possible.
It clips negative gate ringing peaks and takes energy out of gate oscillations.

Also add a reverse biased zener at the same location, of voltage slightly above Vdrive max.
This absorbs positive transients from eg Millar coupling from load.
Notionally only needed if load inductive (yours is) BUT always a good idea.

Answer 3

It can help you with self-turn on problems as it is explained in https://toshiba.semicon-storage.com/info/application_note_en_20180726_AKX00074.pdf?did=59473 chapter 3. It will also demand more power from the driver if you add it. Also, it can help you with your ringing as your experiment confirmed. This is because it decreases the impedance, so the Q factor during turn OFF since it increases Cgs. Here you will find an excellent explanation about the Q factor:

Calculating the pulldown resistance for a given MOSFET's gate