I am looking at a reference design for the allwinner H6 SoC. My question is pretty straightforward. Why does pin B3 need to be powered if the EPHY pins are unused. Additionally, pin B4 is being pulled down through the use of a 6k ohm resistor(incorrect assumption). [These have been answered]

What would you do regarding EPHY pins? Follow the design reference, include 50-150k Ohm Pu resistors, or include 50 Ohm pu resistors in the EPHY pins like Passerby recommends here.

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Even though the PHY isn't being used by the board, it still needs to be powered so it doesn't disrupt the rest of the chip system internally.

It is possible to design chips so that PHYs are on their own power islands that can be shut off, but this takes area and is hard to verify. The PHY probably does have an internal power-down mode that you can select to minimize its current.

the EPHY-RTX resistor isn't a pull-down. It's a bias reference for internal current and voltage sources that the PHY needs to work. Since the PHY is powered up it likely still needs this reference to operate, even when unused.

I don't think you need to do anything with the TX and RX pins at all. They have internal termination that will keep them from doing anything nasty.

  • \$\begingroup\$ Thank you, I will keep that in mind and google the purpose of bias reference resistors. I am still confused why the other pins are not being pulled up. I thought it was good practice to do so. \$\endgroup\$ – circuit_noob533 Aug 13 '19 at 21:16
  • \$\begingroup\$ Does your first response apply to all sub systems of the chip? Is it a good rule of thumb to always power up every sub system even if it won't be used? \$\endgroup\$ – circuit_noob533 Aug 13 '19 at 21:24
  • 1
    \$\begingroup\$ Yes. Unless the manufacturer states otherwise, all power pins need to be connected. \$\endgroup\$ – hacktastical Aug 13 '19 at 21:33

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