I am developing a low power board using the STM32L053C8T6TR and have written a schematic to power the board with a 3V coin cell battery and have a few questions.
In addition to that, the schematic shows the following. Based on the DS STM32 Getting Started I have the following
My question, I am trying to power the board primarily through a coin cell at 3V with the ability to run power through USB if needed while programming (If not using the STLink SWD breakout) Based on the schematics and documentation, I am not really able to tell if I am using too many caps around the LDO, and around the bead between VDD-VDDA. The documentation states N * 100nF + 1 10nF. What is the optimal capacitance and number of caps needed on the 5V input side, and on the output side?
Same goes for the VDD-VDDA capacitors and bead. Am I over subscribing capacitance for a 3V coin cell?
Edit: After looking through some more schematics and datasheets, i'm not even sure there needs to be caps between VDD-VDDA with the bead. Most schematics I see only have the bead. Since this is going to be a super low power dev board working on a coin cell, is all that needed?
Edit: Edited the question to focus on power input and capacitance around the LDO and VDD-VDDA