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I am trying to make the 7 segment display of my FPGA work. I found some working code, but I got issues with the pin planner. The FPGA is this, a knockoff Altera Cyclone IV E EP4CE6E22C8. The code :

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity  seven_segments is
port (
      clk : in std_logic;
        bcd : in std_logic_vector(3 downto 0);  --BCD input
        segment7 : out std_logic_vector(6 downto 0)  -- 7 bit decoded output.
    );
end seven_segments;
--'a' corresponds to MSB of segment7 and g corresponds to LSB of segment7.
architecture Behavioral of seven_segments is

begin
process (clk,bcd)
BEGIN
if (clk'event and clk='1') then
case  bcd is
when "0000"=> segment7 <="0000001";  -- '0'
when "0001"=> segment7 <="1001111";  -- '1'
when "0010"=> segment7 <="0010010";  -- '2'
when "0011"=> segment7 <="0000110";  -- '3'
when "0100"=> segment7 <="1001100";  -- '4'
when "0101"=> segment7 <="0100100";  -- '5'
when "0110"=> segment7 <="0100000";  -- '6'
when "0111"=> segment7 <="0001111";  -- '7'
when "1000"=> segment7 <="0000000";  -- '8'
when "1001"=> segment7 <="0000100";  -- '9'
 --nothing is displayed when a number more than 9 is given as input.
when others=> segment7 <="1111111";
end case;
end if;

end process;

end Behavioral;

The code compiles and I can upload it, I just can't change the pins so that they can match the ones of my FPGA. I was thinking to use the dip switches as inputs. Some screenshots below.

Output Pins for 7 Seg Display Error message

To whoever takes sometime to help, thank you!

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  • \$\begingroup\$ As a start, look in the project's .qsf (Quartus Settings File). That will list the pin physical constraints including pin locations. You can edit and save that directly, following the format of the existing pin location constraints, which should be there from what you show. Then try synthesizing that and let us know. \$\endgroup\$ – TonyM Aug 19 '19 at 8:35
  • \$\begingroup\$ I am sorry, but i am kind of new to this, where can i locate the .qsf file? Also i think that i when started the project i chose the .osf file format, would that be a problem? \$\endgroup\$ – Rozakos Aug 19 '19 at 9:06
  • \$\begingroup\$ Enter your pins in the Pin Planner Location column. They will be assigned when you rebuild the project. \$\endgroup\$ – Leon Heller Aug 19 '19 at 9:34
  • \$\begingroup\$ That seems to have done the trick! Thank you very much! Ok one more question, is it possible to set the CLK on HIGH all the time? I guess i could assign it to the dip switch? \$\endgroup\$ – Rozakos Aug 19 '19 at 10:09
  • \$\begingroup\$ There are several ways of assigning pins - best is to insert them in the code but I've forgotten how to do that. Can't help with your CLK problem. \$\endgroup\$ – Leon Heller Aug 19 '19 at 10:20
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Enter your pins in the Pin Planner Location column. They will be assigned when you rebuild the project.

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